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Diffstat (limited to 'hw/timer')
-rw-r--r--hw/timer/digic-timer.c4
-rw-r--r--hw/timer/etraxfs_timer.c3
-rw-r--r--hw/timer/exynos4210_mct.c2
-rw-r--r--hw/timer/exynos4210_pwm.c4
4 files changed, 6 insertions, 7 deletions
diff --git a/hw/timer/digic-timer.c b/hw/timer/digic-timer.c
index d5186f4..973eab4 100644
--- a/hw/timer/digic-timer.c
+++ b/hw/timer/digic-timer.c
@@ -76,7 +76,7 @@ static uint64_t digic_timer_read(void *opaque, hwaddr offset, unsigned size)
default:
qemu_log_mask(LOG_UNIMP,
"digic-timer: read access to unknown register 0x"
- TARGET_FMT_plx "\n", offset);
+ HWADDR_FMT_plx "\n", offset);
}
return ret;
@@ -116,7 +116,7 @@ static void digic_timer_write(void *opaque, hwaddr offset,
default:
qemu_log_mask(LOG_UNIMP,
"digic-timer: read access to unknown register 0x"
- TARGET_FMT_plx "\n", offset);
+ HWADDR_FMT_plx "\n", offset);
}
}
diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c
index ecc2831..2d6d92e 100644
--- a/hw/timer/etraxfs_timer.c
+++ b/hw/timer/etraxfs_timer.c
@@ -324,8 +324,7 @@ timer_write(void *opaque, hwaddr addr,
t->rw_ack_intr = 0;
break;
default:
- printf ("%s " TARGET_FMT_plx " %x\n",
- __func__, addr, value);
+ printf("%s " HWADDR_FMT_plx " %x\n", __func__, addr, value);
break;
}
}
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
index e175a9f..c17b247 100644
--- a/hw/timer/exynos4210_mct.c
+++ b/hw/timer/exynos4210_mct.c
@@ -1445,7 +1445,7 @@ static void exynos4210_mct_write(void *opaque, hwaddr offset,
case L0_ICNTO: case L1_ICNTO:
case L0_FRCNTO: case L1_FRCNTO:
qemu_log_mask(LOG_GUEST_ERROR,
- "exynos4210.mct: write to RO register " TARGET_FMT_plx,
+ "exynos4210.mct: write to RO register " HWADDR_FMT_plx,
offset);
break;
diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c
index 02924a9..3528d0f 100644
--- a/hw/timer/exynos4210_pwm.c
+++ b/hw/timer/exynos4210_pwm.c
@@ -257,7 +257,7 @@ static uint64_t exynos4210_pwm_read(void *opaque, hwaddr offset,
default:
qemu_log_mask(LOG_GUEST_ERROR,
- "exynos4210.pwm: bad read offset " TARGET_FMT_plx,
+ "exynos4210.pwm: bad read offset " HWADDR_FMT_plx,
offset);
break;
}
@@ -352,7 +352,7 @@ static void exynos4210_pwm_write(void *opaque, hwaddr offset,
default:
qemu_log_mask(LOG_GUEST_ERROR,
- "exynos4210.pwm: bad write offset " TARGET_FMT_plx,
+ "exynos4210.pwm: bad write offset " HWADDR_FMT_plx,
offset);
break;