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Diffstat (limited to 'hw/pci-host/bonito.c')
-rw-r--r--hw/pci-host/bonito.c87
1 files changed, 71 insertions, 16 deletions
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index f212796..f9697dc 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -11,7 +11,7 @@
*/
/*
- * fulong 2e mini pc has a bonito north bridge.
+ * fuloong 2e mini pc has a bonito north bridge.
*/
/*
@@ -39,6 +39,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu/error-report.h"
#include "hw/pci/pci.h"
#include "hw/irq.h"
@@ -48,6 +49,8 @@
#include "sysemu/reset.h"
#include "sysemu/runstate.h"
#include "exec/address-spaces.h"
+#include "hw/misc/unimp.h"
+#include "hw/registerfields.h"
/* #define DEBUG_BONITO */
@@ -81,7 +84,7 @@
#define BONITO_PCILO1_BASE 0x14000000
#define BONITO_PCILO2_BASE 0x18000000
#define BONITO_PCIHI_BASE 0x20000000
-#define BONITO_PCIHI_SIZE 0x20000000
+#define BONITO_PCIHI_SIZE 0x60000000
#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
#define BONITO_PCIIO_BASE 0x1fd00000
#define BONITO_PCIIO_BASE_VA 0xbfd00000
@@ -110,8 +113,19 @@
/* Power on register */
#define BONITO_BONPONCFG (0x00 >> 2) /* 0x100 */
+
+/* PCI configuration register */
#define BONITO_BONGENCFG_OFFSET 0x4
#define BONITO_BONGENCFG (BONITO_BONGENCFG_OFFSET >> 2) /*0x104 */
+REG32(BONGENCFG, 0x104)
+FIELD(BONGENCFG, DEBUGMODE, 0, 1)
+FIELD(BONGENCFG, SNOOP, 1, 1)
+FIELD(BONGENCFG, CPUSELFRESET, 2, 1)
+FIELD(BONGENCFG, BYTESWAP, 6, 1)
+FIELD(BONGENCFG, UNCACHED, 7, 1)
+FIELD(BONGENCFG, PREFETCH, 8, 1)
+FIELD(BONGENCFG, WRITEBEHIND, 9, 1)
+FIELD(BONGENCFG, PCIQUEUE, 12, 1)
/* 2. IO & IDE configuration */
#define BONITO_IODEVCFG (0x08 >> 2) /* 0x108 */
@@ -239,7 +253,7 @@ static void bonito_writel(void *opaque, hwaddr addr,
saddr = addr >> 2;
- DPRINTF("bonito_writel "TARGET_FMT_plx" val %x saddr %x\n",
+ DPRINTF("bonito_writel "TARGET_FMT_plx" val %lx saddr %x\n",
addr, val, saddr);
switch (saddr) {
case BONITO_BONPONCFG:
@@ -327,7 +341,7 @@ static void bonito_pciconf_writel(void *opaque, hwaddr addr,
PCIBonitoState *s = opaque;
PCIDevice *d = PCI_DEVICE(s);
- DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %x\n", addr, val);
+ DPRINTF("bonito_pciconf_writel "TARGET_FMT_plx" val %lx\n", addr, val);
d->config_write(d, addr, val, 4);
}
@@ -474,7 +488,7 @@ static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val,
uint32_t pciaddr;
uint16_t status;
- DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %x\n",
+ DPRINTF("bonito_spciconf_write "TARGET_FMT_plx" size %d val %lx\n",
addr, size, val);
pciaddr = bonito_sbridge_pciaddr(s, addr);
@@ -559,11 +573,11 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
slot = (pci_dev->devfn >> 3);
switch (slot) {
- case 5: /* FULONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
+ case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
return irq_num % 4 + BONITO_IRQ_BASE;
- case 6: /* FULONG2E_ATI_SLOT, VGA */
+ case 6: /* FULOONG2E_ATI_SLOT, VGA */
return 4 + BONITO_IRQ_BASE;
- case 7: /* FULONG2E_RTL_SLOT, RTL8139 */
+ case 7: /* FULOONG2E_RTL_SLOT, RTL8139 */
return 5 + BONITO_IRQ_BASE;
case 8 ... 12: /* PCI slot 1 to 4 */
return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
@@ -575,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
static void bonito_reset(void *opaque)
{
PCIBonitoState *s = opaque;
+ uint32_t val = 0;
/* set the default value of north bridge registers */
s->regs[BONITO_BONPONCFG] = 0xc40;
- s->regs[BONITO_BONGENCFG] = 0x1384;
+ val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1);
+ val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
+ val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
+ val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
+ val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
+ s->regs[BONITO_BONGENCFG] = val;
+
s->regs[BONITO_IODEVCFG] = 0x2bff8010;
s->regs[BONITO_SDCFG] = 0x255e0091;
@@ -604,14 +625,26 @@ static void bonito_pcihost_realize(DeviceState *dev, Error **errp)
{
PCIHostState *phb = PCI_HOST_BRIDGE(dev);
BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);
+ MemoryRegion *pcimem_lo_alias = g_new(MemoryRegion, 3);
- memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE);
+ memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE);
phb->bus = pci_register_root_bus(dev, "pci",
pci_bonito_set_irq, pci_bonito_map_irq,
dev, &bs->pci_mem, get_system_io(),
0x28, 32, TYPE_PCI_BUS);
- memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,
- &bs->pci_mem);
+
+ for (size_t i = 0; i < 3; i++) {
+ char *name = g_strdup_printf("pci.lomem%zu", i);
+
+ memory_region_init_alias(&pcimem_lo_alias[i], NULL, name,
+ &bs->pci_mem, i * 64 * MiB, 64 * MiB);
+ memory_region_add_subregion(get_system_memory(),
+ BONITO_PCILO_BASE + i * 64 * MiB,
+ &pcimem_lo_alias[i]);
+ g_free(name);
+ }
+
+ create_unimplemented_device("pci.io", BONITO_PCIIO_BASE, 1 * MiB);
}
static void bonito_realize(PCIDevice *dev, Error **errp)
@@ -619,6 +652,8 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
PCIBonitoState *s = PCI_BONITO(dev);
SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);
PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
+ BonitoState *bs = BONITO_PCI_HOST_BRIDGE(s->pcihost);
+ MemoryRegion *pcimem_alias = g_new(MemoryRegion, 1);
/*
* Bonito North Bridge, built on FPGA,
@@ -644,15 +679,20 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
sysbus_init_mmio(sysbus, &phb->data_mem);
sysbus_mmio_map(sysbus, 2, BONITO_SPCICONFIG_BASE);
+ create_unimplemented_device("bonito", BONITO_REG_BASE, BONITO_REG_SIZE);
+
memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s,
"ldma", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_ldma);
- sysbus_mmio_map(sysbus, 3, 0xbfe00200);
+ sysbus_mmio_map(sysbus, 3, 0x1fe00200);
+ /* PCI copier */
memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s,
"cop", 0x100);
sysbus_init_mmio(sysbus, &s->iomem_cop);
- sysbus_mmio_map(sysbus, 4, 0xbfe00300);
+ sysbus_mmio_map(sysbus, 4, 0x1fe00300);
+
+ create_unimplemented_device("ROMCS", BONITO_FLASH_BASE, 60 * MiB);
/* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */
memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio",
@@ -661,10 +701,25 @@ static void bonito_realize(PCIDevice *dev, Error **errp)
sysbus_mmio_map(sysbus, 5, BONITO_PCIIO_BASE);
/* add pci local io mapping */
- memory_region_init_alias(&s->bonito_localio, OBJECT(s), "isa_mmio",
- get_system_io(), 0, BONITO_DEV_SIZE);
+
+ memory_region_init_alias(&s->bonito_localio, OBJECT(s), "IOCS[0]",
+ get_system_io(), 0, 256 * KiB);
sysbus_init_mmio(sysbus, &s->bonito_localio);
sysbus_mmio_map(sysbus, 6, BONITO_DEV_BASE);
+ create_unimplemented_device("IOCS[1]", BONITO_DEV_BASE + 1 * 256 * KiB,
+ 256 * KiB);
+ create_unimplemented_device("IOCS[2]", BONITO_DEV_BASE + 2 * 256 * KiB,
+ 256 * KiB);
+ create_unimplemented_device("IOCS[3]", BONITO_DEV_BASE + 3 * 256 * KiB,
+ 256 * KiB);
+
+ memory_region_init_alias(pcimem_alias, NULL, "pci.mem.alias",
+ &bs->pci_mem, 0, BONITO_PCIHI_SIZE);
+ memory_region_add_subregion(get_system_memory(),
+ BONITO_PCIHI_BASE, pcimem_alias);
+ create_unimplemented_device("PCI_2",
+ (hwaddr)BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE,
+ 2 * GiB);
/* set the default value of north bridge pci config */
pci_set_word(dev->config + PCI_COMMAND, 0x0000);
generated by cgit v1.1 at 2025-02-03 10:23:03 +0000