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path: root/hw/net/cadence_gem.c
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Diffstat (limited to 'hw/net/cadence_gem.c')
-rw-r--r--hw/net/cadence_gem.c21
1 files changed, 9 insertions, 12 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 871fcf2..ddabdb3 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -871,7 +871,7 @@ static void gem_get_rx_desc(CadenceGEMState *s, int q)
/* read current descriptor */
address_space_read(&s->dma_as, desc_addr, MEMTXATTRS_UNSPECIFIED,
- (uint8_t *)s->rx_desc[q],
+ s->rx_desc[q],
sizeof(uint32_t) * gem_get_desc_len(s, true));
/* Descriptor owned by software ? */
@@ -1029,9 +1029,8 @@ static ssize_t gem_receive(NetClientState *nc, const uint8_t *buf, size_t size)
/* Descriptor write-back. */
desc_addr = gem_get_rx_desc_addr(s, q);
- address_space_write(&s->dma_as, desc_addr,
- MEMTXATTRS_UNSPECIFIED,
- (uint8_t *)s->rx_desc[q],
+ address_space_write(&s->dma_as, desc_addr, MEMTXATTRS_UNSPECIFIED,
+ s->rx_desc[q],
sizeof(uint32_t) * gem_get_desc_len(s, true));
/* Next descriptor */
@@ -1137,7 +1136,7 @@ static void gem_transmit(CadenceGEMState *s)
DB_PRINT("read descriptor 0x%" HWADDR_PRIx "\n", packet_desc_addr);
address_space_read(&s->dma_as, packet_desc_addr,
- MEMTXATTRS_UNSPECIFIED, (uint8_t *)desc,
+ MEMTXATTRS_UNSPECIFIED, desc,
sizeof(uint32_t) * gem_get_desc_len(s, false));
/* Handle all descriptors owned by hardware */
while (tx_desc_get_used(desc) == 0) {
@@ -1185,14 +1184,12 @@ static void gem_transmit(CadenceGEMState *s)
* the processor.
*/
address_space_read(&s->dma_as, desc_addr,
- MEMTXATTRS_UNSPECIFIED,
- (uint8_t *)desc_first,
+ MEMTXATTRS_UNSPECIFIED, desc_first,
sizeof(desc_first));
tx_desc_set_used(desc_first);
address_space_write(&s->dma_as, desc_addr,
- MEMTXATTRS_UNSPECIFIED,
- (uint8_t *)desc_first,
- sizeof(desc_first));
+ MEMTXATTRS_UNSPECIFIED, desc_first,
+ sizeof(desc_first));
/* Advance the hardware current descriptor past this packet */
if (tx_desc_get_wrap(desc)) {
s->tx_desc_addr[q] = s->regs[GEM_TXQBASE];
@@ -1246,8 +1243,8 @@ static void gem_transmit(CadenceGEMState *s)
}
DB_PRINT("read descriptor 0x%" HWADDR_PRIx "\n", packet_desc_addr);
address_space_read(&s->dma_as, packet_desc_addr,
- MEMTXATTRS_UNSPECIFIED, (uint8_t *)desc,
- sizeof(uint32_t) * gem_get_desc_len(s, false));
+ MEMTXATTRS_UNSPECIFIED, desc,
+ sizeof(uint32_t) * gem_get_desc_len(s, false));
}
if (tx_desc_get_used(desc)) {