diff options
Diffstat (limited to 'hw/isa_mmio.c')
| -rw-r--r-- | hw/isa_mmio.c | 102 |
1 files changed, 20 insertions, 82 deletions
diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c index 46458f4..ca957fb 100644 --- a/hw/isa_mmio.c +++ b/hw/isa_mmio.c @@ -31,27 +31,13 @@ static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr, cpu_outb(addr & IOPORTS_MASK, val); } -static void isa_mmio_writew_be(void *opaque, target_phys_addr_t addr, +static void isa_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val) { - val = bswap16(val); cpu_outw(addr & IOPORTS_MASK, val); } -static void isa_mmio_writew_le(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - cpu_outw(addr & IOPORTS_MASK, val); -} - -static void isa_mmio_writel_be(void *opaque, target_phys_addr_t addr, - uint32_t val) -{ - val = bswap32(val); - cpu_outl(addr & IOPORTS_MASK, val); -} - -static void isa_mmio_writel_le(void *opaque, target_phys_addr_t addr, +static void isa_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val) { cpu_outl(addr & IOPORTS_MASK, val); @@ -59,86 +45,38 @@ static void isa_mmio_writel_le(void *opaque, target_phys_addr_t addr, static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr) { - uint32_t val; - - val = cpu_inb(addr & IOPORTS_MASK); - return val; + return cpu_inb(addr & IOPORTS_MASK); } -static uint32_t isa_mmio_readw_be(void *opaque, target_phys_addr_t addr) +static uint32_t isa_mmio_readw(void *opaque, target_phys_addr_t addr) { - uint32_t val; - - val = cpu_inw(addr & IOPORTS_MASK); - val = bswap16(val); - return val; + return cpu_inw(addr & IOPORTS_MASK); } -static uint32_t isa_mmio_readw_le(void *opaque, target_phys_addr_t addr) +static uint32_t isa_mmio_readl(void *opaque, target_phys_addr_t addr) { - uint32_t val; - - val = cpu_inw(addr & IOPORTS_MASK); - return val; + return cpu_inl(addr & IOPORTS_MASK); } -static uint32_t isa_mmio_readl_be(void *opaque, target_phys_addr_t addr) -{ - uint32_t val; - - val = cpu_inl(addr & IOPORTS_MASK); - val = bswap32(val); - return val; -} - -static uint32_t isa_mmio_readl_le(void *opaque, target_phys_addr_t addr) -{ - uint32_t val; - - val = cpu_inl(addr & IOPORTS_MASK); - return val; -} - -static CPUWriteMemoryFunc * const isa_mmio_write_be[] = { - &isa_mmio_writeb, - &isa_mmio_writew_be, - &isa_mmio_writel_be, -}; - -static CPUReadMemoryFunc * const isa_mmio_read_be[] = { - &isa_mmio_readb, - &isa_mmio_readw_be, - &isa_mmio_readl_be, -}; - -static CPUWriteMemoryFunc * const isa_mmio_write_le[] = { +static CPUWriteMemoryFunc * const isa_mmio_write[] = { &isa_mmio_writeb, - &isa_mmio_writew_le, - &isa_mmio_writel_le, + &isa_mmio_writew, + &isa_mmio_writel, }; -static CPUReadMemoryFunc * const isa_mmio_read_le[] = { +static CPUReadMemoryFunc * const isa_mmio_read[] = { &isa_mmio_readb, - &isa_mmio_readw_le, - &isa_mmio_readl_le, + &isa_mmio_readw, + &isa_mmio_readl, }; -static int isa_mmio_iomemtype = 0; - -void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size, int be) +void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size) { - if (!isa_mmio_iomemtype) { - if (be) { - isa_mmio_iomemtype = cpu_register_io_memory(isa_mmio_read_be, - isa_mmio_write_be, - NULL, - DEVICE_NATIVE_ENDIAN); - } else { - isa_mmio_iomemtype = cpu_register_io_memory(isa_mmio_read_le, - isa_mmio_write_le, - NULL, - DEVICE_NATIVE_ENDIAN); - } - } + int isa_mmio_iomemtype; + + isa_mmio_iomemtype = cpu_register_io_memory(isa_mmio_read, + isa_mmio_write, + NULL, + DEVICE_LITTLE_ENDIAN); cpu_register_physical_memory(base, size, isa_mmio_iomemtype); } |