aboutsummaryrefslogtreecommitdiff
path: root/hw/ide/mmio.c
diff options
context:
space:
mode:
Diffstat (limited to 'hw/ide/mmio.c')
-rw-r--r--hw/ide/mmio.c37
1 files changed, 16 insertions, 21 deletions
diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c
index fb2ebd4..3aeacab 100644
--- a/hw/ide/mmio.c
+++ b/hw/ide/mmio.c
@@ -29,9 +29,9 @@
#include "qemu/module.h"
#include "sysemu/dma.h"
+#include "hw/ide/mmio.h"
#include "hw/ide/internal.h"
#include "hw/qdev-properties.h"
-#include "qom/object.h"
/***********************************************************/
/* MMIO based ide port
@@ -39,11 +39,6 @@
* dedicated ide controller, which is often seen on embedded boards.
*/
-#define TYPE_MMIO_IDE "mmio-ide"
-typedef struct MMIOIDEState MMIOState;
-DECLARE_INSTANCE_CHECKER(MMIOState, MMIO_IDE,
- TYPE_MMIO_IDE)
-
struct MMIOIDEState {
/*< private >*/
SysBusDevice parent_obj;
@@ -58,7 +53,7 @@ struct MMIOIDEState {
static void mmio_ide_reset(DeviceState *dev)
{
- MMIOState *s = MMIO_IDE(dev);
+ MMIOIDEState *s = MMIO_IDE(dev);
ide_bus_reset(&s->bus);
}
@@ -66,7 +61,7 @@ static void mmio_ide_reset(DeviceState *dev)
static uint64_t mmio_ide_read(void *opaque, hwaddr addr,
unsigned size)
{
- MMIOState *s = opaque;
+ MMIOIDEState *s = opaque;
addr >>= s->shift;
if (addr & 7)
return ide_ioport_read(&s->bus, addr);
@@ -77,7 +72,7 @@ static uint64_t mmio_ide_read(void *opaque, hwaddr addr,
static void mmio_ide_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
- MMIOState *s = opaque;
+ MMIOIDEState *s = opaque;
addr >>= s->shift;
if (addr & 7)
ide_ioport_write(&s->bus, addr, val);
@@ -94,14 +89,14 @@ static const MemoryRegionOps mmio_ide_ops = {
static uint64_t mmio_ide_status_read(void *opaque, hwaddr addr,
unsigned size)
{
- MMIOState *s= opaque;
+ MMIOIDEState *s = opaque;
return ide_status_read(&s->bus, 0);
}
static void mmio_ide_ctrl_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size)
{
- MMIOState *s = opaque;
+ MMIOIDEState *s = opaque;
ide_ctrl_write(&s->bus, 0, val);
}
@@ -116,8 +111,8 @@ static const VMStateDescription vmstate_ide_mmio = {
.version_id = 3,
.minimum_version_id = 0,
.fields = (VMStateField[]) {
- VMSTATE_IDE_BUS(bus, MMIOState),
- VMSTATE_IDE_DRIVES(bus.ifs, MMIOState),
+ VMSTATE_IDE_BUS(bus, MMIOIDEState),
+ VMSTATE_IDE_DRIVES(bus.ifs, MMIOIDEState),
VMSTATE_END_OF_LIST()
}
};
@@ -125,9 +120,9 @@ static const VMStateDescription vmstate_ide_mmio = {
static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
{
SysBusDevice *d = SYS_BUS_DEVICE(dev);
- MMIOState *s = MMIO_IDE(dev);
+ MMIOIDEState *s = MMIO_IDE(dev);
- ide_init2(&s->bus, s->irq);
+ ide_bus_init_output_irq(&s->bus, s->irq);
memory_region_init_io(&s->iomem1, OBJECT(s), &mmio_ide_ops, s,
"ide-mmio.1", 16 << s->shift);
@@ -140,14 +135,14 @@ static void mmio_ide_realizefn(DeviceState *dev, Error **errp)
static void mmio_ide_initfn(Object *obj)
{
SysBusDevice *d = SYS_BUS_DEVICE(obj);
- MMIOState *s = MMIO_IDE(obj);
+ MMIOIDEState *s = MMIO_IDE(obj);
ide_bus_init(&s->bus, sizeof(s->bus), DEVICE(obj), 0, 2);
sysbus_init_irq(d, &s->irq);
}
static Property mmio_ide_properties[] = {
- DEFINE_PROP_UINT32("shift", MMIOState, shift, 0),
+ DEFINE_PROP_UINT32("shift", MMIOIDEState, shift, 0),
DEFINE_PROP_END_OF_LIST()
};
@@ -164,7 +159,7 @@ static void mmio_ide_class_init(ObjectClass *oc, void *data)
static const TypeInfo mmio_ide_type_info = {
.name = TYPE_MMIO_IDE,
.parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(MMIOState),
+ .instance_size = sizeof(MMIOIDEState),
.instance_init = mmio_ide_initfn,
.class_init = mmio_ide_class_init,
};
@@ -176,13 +171,13 @@ static void mmio_ide_register_types(void)
void mmio_ide_init_drives(DeviceState *dev, DriveInfo *hd0, DriveInfo *hd1)
{
- MMIOState *s = MMIO_IDE(dev);
+ MMIOIDEState *s = MMIO_IDE(dev);
if (hd0 != NULL) {
- ide_create_drive(&s->bus, 0, hd0);
+ ide_bus_create_drive(&s->bus, 0, hd0);
}
if (hd1 != NULL) {
- ide_create_drive(&s->bus, 1, hd1);
+ ide_bus_create_drive(&s->bus, 1, hd1);
}
}