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Diffstat (limited to 'hw/char/sifive_uart.c')
-rw-r--r--hw/char/sifive_uart.c114
1 files changed, 104 insertions, 10 deletions
diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c
index 5df8212..278e21c 100644
--- a/hw/char/sifive_uart.c
+++ b/hw/char/sifive_uart.c
@@ -19,10 +19,12 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu/log.h"
+#include "migration/vmstate.h"
#include "chardev/char.h"
#include "chardev/char-fe.h"
#include "hw/irq.h"
#include "hw/char/sifive_uart.h"
+#include "hw/qdev-properties-system.h"
/*
* Not yet implemented:
@@ -175,20 +177,112 @@ static int sifive_uart_be_change(void *opaque)
return 0;
}
+static Property sifive_uart_properties[] = {
+ DEFINE_PROP_CHR("chardev", SiFiveUARTState, chr),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void sifive_uart_init(Object *obj)
+{
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ SiFiveUARTState *s = SIFIVE_UART(obj);
+
+ memory_region_init_io(&s->mmio, OBJECT(s), &sifive_uart_ops, s,
+ TYPE_SIFIVE_UART, SIFIVE_UART_MAX);
+ sysbus_init_mmio(sbd, &s->mmio);
+ sysbus_init_irq(sbd, &s->irq);
+}
+
+static void sifive_uart_realize(DeviceState *dev, Error **errp)
+{
+ SiFiveUARTState *s = SIFIVE_UART(dev);
+
+ qemu_chr_fe_set_handlers(&s->chr, sifive_uart_can_rx, sifive_uart_rx,
+ sifive_uart_event, sifive_uart_be_change, s,
+ NULL, true);
+
+}
+
+static void sifive_uart_reset_enter(Object *obj, ResetType type)
+{
+ SiFiveUARTState *s = SIFIVE_UART(obj);
+ s->ie = 0;
+ s->ip = 0;
+ s->txctrl = 0;
+ s->rxctrl = 0;
+ s->div = 0;
+ s->rx_fifo_len = 0;
+}
+
+static void sifive_uart_reset_hold(Object *obj)
+{
+ SiFiveUARTState *s = SIFIVE_UART(obj);
+ qemu_irq_lower(s->irq);
+}
+
+static const VMStateDescription vmstate_sifive_uart = {
+ .name = TYPE_SIFIVE_UART,
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8_ARRAY(rx_fifo, SiFiveUARTState,
+ SIFIVE_UART_RX_FIFO_SIZE),
+ VMSTATE_UINT8(rx_fifo_len, SiFiveUARTState),
+ VMSTATE_UINT32(ie, SiFiveUARTState),
+ VMSTATE_UINT32(ip, SiFiveUARTState),
+ VMSTATE_UINT32(txctrl, SiFiveUARTState),
+ VMSTATE_UINT32(rxctrl, SiFiveUARTState),
+ VMSTATE_UINT32(div, SiFiveUARTState),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
+
+static void sifive_uart_class_init(ObjectClass *oc, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(oc);
+ ResettableClass *rc = RESETTABLE_CLASS(oc);
+
+ dc->realize = sifive_uart_realize;
+ dc->vmsd = &vmstate_sifive_uart;
+ rc->phases.enter = sifive_uart_reset_enter;
+ rc->phases.hold = sifive_uart_reset_hold;
+ device_class_set_props(dc, sifive_uart_properties);
+}
+
+static const TypeInfo sifive_uart_info = {
+ .name = TYPE_SIFIVE_UART,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(SiFiveUARTState),
+ .instance_init = sifive_uart_init,
+ .class_init = sifive_uart_class_init,
+};
+
+static void sifive_uart_register_types(void)
+{
+ type_register_static(&sifive_uart_info);
+}
+
+type_init(sifive_uart_register_types)
+
/*
* Create UART device.
*/
SiFiveUARTState *sifive_uart_create(MemoryRegion *address_space, hwaddr base,
Chardev *chr, qemu_irq irq)
{
- SiFiveUARTState *s = g_malloc0(sizeof(SiFiveUARTState));
- s->irq = irq;
- qemu_chr_fe_init(&s->chr, chr, &error_abort);
- qemu_chr_fe_set_handlers(&s->chr, sifive_uart_can_rx, sifive_uart_rx,
- sifive_uart_event, sifive_uart_be_change, s,
- NULL, true);
- memory_region_init_io(&s->mmio, NULL, &sifive_uart_ops, s,
- TYPE_SIFIVE_UART, SIFIVE_UART_MAX);
- memory_region_add_subregion(address_space, base, &s->mmio);
- return s;
+ DeviceState *dev;
+ SysBusDevice *s;
+ SiFiveUARTState *r;
+
+ dev = qdev_new("riscv.sifive.uart");
+ s = SYS_BUS_DEVICE(dev);
+ qdev_prop_set_chr(dev, "chardev", chr);
+ sysbus_realize_and_unref(s, &error_fatal);
+ memory_region_add_subregion(address_space, base,
+ sysbus_mmio_get_region(s, 0));
+ sysbus_connect_irq(s, 0, irq);
+
+ r = SIFIVE_UART(dev);
+ return r;
}