diff options
| -rw-r--r-- | target-sparc/translate.c | 3 | ||||
| -rw-r--r-- | tcg/tcg-op.h | 11 |
2 files changed, 11 insertions, 3 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 0f9cda9..36381c4 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4401,7 +4401,8 @@ static void disas_sparc_insn(DisasContext * dc) /* V9 stqf, store quad fpreg */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT0(QFPREG(rd)); - tcg_gen_helper_0_2(helper_stqf, cpu_addr, dc->mem_idx); + tcg_gen_helper_0_2(helper_stqf, cpu_addr, + tcg_const_i32(dc->mem_idx)); break; #else /* !TARGET_SPARC64 */ /* stdfq, store floating point queue */ diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 6c9dd76..aa5206e 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -56,6 +56,13 @@ static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) *gen_opparam_ptr++ = arg2; } +static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2) +{ + *gen_opc_ptr++ = opc; + *gen_opparam_ptr++ = arg1; + *gen_opparam_ptr++ = arg2; +} + static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) { *gen_opc_ptr++ = opc; @@ -1406,8 +1413,8 @@ static inline void tcg_gen_debug_insn_start(uint64_t pc) { /* XXX: must really use a 32 bit size for TCGArg in all cases */ #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS - tcg_gen_op2i(INDEX_op_debug_insn_start, - (uint32_t)(pc), (uint32_t)(pc >> 32)); + tcg_gen_op2ii(INDEX_op_debug_insn_start, + (uint32_t)(pc), (uint32_t)(pc >> 32)); #else tcg_gen_op1i(INDEX_op_debug_insn_start, pc); #endif |