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-rw-r--r--target/riscv/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index bf58b0f..d74b361 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -214,13 +214,13 @@ struct CPUArchState {
/*
* When mideleg[i]=0 and mvien[i]=1, sie[i] is no more
- * alias of mie[i] and needs to be maintained separatly.
+ * alias of mie[i] and needs to be maintained separately.
*/
uint64_t sie;
/*
* When hideleg[i]=0 and hvien[i]=1, vsie[i] is no more
- * alias of sie[i] (mie[i]) and needs to be maintained separatly.
+ * alias of sie[i] (mie[i]) and needs to be maintained separately.
*/
uint64_t vsie;