diff options
| -rw-r--r-- | hw/ppc/pnv.c | 2 | ||||
| -rw-r--r-- | hw/ppc/pnv_occ.c | 55 | ||||
| -rw-r--r-- | include/hw/ppc/pnv_occ.h | 15 |
3 files changed, 54 insertions, 18 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 918fae0..6ae9ce6 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -790,7 +790,7 @@ static void pnv_chip_power8_instance_init(Object *obj) OBJECT(&chip8->psi), &error_abort); object_initialize_child(obj, "occ", &chip8->occ, sizeof(chip8->occ), - TYPE_PNV_OCC, &error_abort, NULL); + TYPE_PNV8_OCC, &error_abort, NULL); object_property_add_const_link(OBJECT(&chip8->occ), "psi", OBJECT(&chip8->psi), &error_abort); } diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c index 04880f2..ea72564 100644 --- a/hw/ppc/pnv_occ.c +++ b/hw/ppc/pnv_occ.c @@ -34,15 +34,17 @@ static void pnv_occ_set_misc(PnvOCC *occ, uint64_t val) { bool irq_state; + PnvOCCClass *poc = PNV_OCC_GET_CLASS(occ); val &= 0xffff000000000000ull; occ->occmisc = val; irq_state = !!(val >> 63); - pnv_psi_irq_set(occ->psi, PSIHB_IRQ_OCC, irq_state); + pnv_psi_irq_set(occ->psi, poc->psi_irq, irq_state); } -static uint64_t pnv_occ_xscom_read(void *opaque, hwaddr addr, unsigned size) +static uint64_t pnv_occ_power8_xscom_read(void *opaque, hwaddr addr, + unsigned size) { PnvOCC *occ = PNV_OCC(opaque); uint32_t offset = addr >> 3; @@ -54,13 +56,13 @@ static uint64_t pnv_occ_xscom_read(void *opaque, hwaddr addr, unsigned size) break; default: qemu_log_mask(LOG_UNIMP, "OCC Unimplemented register: Ox%" - HWADDR_PRIx "\n", addr); + HWADDR_PRIx "\n", addr >> 3); } return val; } -static void pnv_occ_xscom_write(void *opaque, hwaddr addr, - uint64_t val, unsigned size) +static void pnv_occ_power8_xscom_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) { PnvOCC *occ = PNV_OCC(opaque); uint32_t offset = addr >> 3; @@ -77,13 +79,13 @@ static void pnv_occ_xscom_write(void *opaque, hwaddr addr, break; default: qemu_log_mask(LOG_UNIMP, "OCC Unimplemented register: Ox%" - HWADDR_PRIx "\n", addr); + HWADDR_PRIx "\n", addr >> 3); } } -static const MemoryRegionOps pnv_occ_xscom_ops = { - .read = pnv_occ_xscom_read, - .write = pnv_occ_xscom_write, +static const MemoryRegionOps pnv_occ_power8_xscom_ops = { + .read = pnv_occ_power8_xscom_read, + .write = pnv_occ_power8_xscom_write, .valid.min_access_size = 8, .valid.max_access_size = 8, .impl.min_access_size = 8, @@ -91,27 +93,42 @@ static const MemoryRegionOps pnv_occ_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; +static void pnv_occ_power8_class_init(ObjectClass *klass, void *data) +{ + PnvOCCClass *poc = PNV_OCC_CLASS(klass); + + poc->xscom_size = PNV_XSCOM_OCC_SIZE; + poc->xscom_ops = &pnv_occ_power8_xscom_ops; + poc->psi_irq = PSIHB_IRQ_OCC; +} + +static const TypeInfo pnv_occ_power8_type_info = { + .name = TYPE_PNV8_OCC, + .parent = TYPE_PNV_OCC, + .instance_size = sizeof(PnvOCC), + .class_init = pnv_occ_power8_class_init, +}; static void pnv_occ_realize(DeviceState *dev, Error **errp) { PnvOCC *occ = PNV_OCC(dev); + PnvOCCClass *poc = PNV_OCC_GET_CLASS(occ); Object *obj; - Error *error = NULL; + Error *local_err = NULL; occ->occmisc = 0; - /* get PSI object from chip */ - obj = object_property_get_link(OBJECT(dev), "psi", &error); + obj = object_property_get_link(OBJECT(dev), "psi", &local_err); if (!obj) { - error_setg(errp, "%s: required link 'psi' not found: %s", - __func__, error_get_pretty(error)); + error_propagate(errp, local_err); + error_prepend(errp, "required link 'psi' not found: "); return; } occ->psi = PNV_PSI(obj); /* XScom region for OCC registers */ - pnv_xscom_region_init(&occ->xscom_regs, OBJECT(dev), &pnv_occ_xscom_ops, - occ, "xscom-occ", PNV_XSCOM_OCC_SIZE); + pnv_xscom_region_init(&occ->xscom_regs, OBJECT(dev), poc->xscom_ops, + occ, "xscom-occ", poc->xscom_size); } static void pnv_occ_class_init(ObjectClass *klass, void *data) @@ -119,6 +136,7 @@ static void pnv_occ_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = pnv_occ_realize; + dc->desc = "PowerNV OCC Controller"; } static const TypeInfo pnv_occ_type_info = { @@ -126,11 +144,14 @@ static const TypeInfo pnv_occ_type_info = { .parent = TYPE_DEVICE, .instance_size = sizeof(PnvOCC), .class_init = pnv_occ_class_init, + .class_size = sizeof(PnvOCCClass), + .abstract = true, }; static void pnv_occ_register_types(void) { type_register_static(&pnv_occ_type_info); + type_register_static(&pnv_occ_power8_type_info); } -type_init(pnv_occ_register_types) +type_init(pnv_occ_register_types); diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h index 82f299d..dab5a05 100644 --- a/include/hw/ppc/pnv_occ.h +++ b/include/hw/ppc/pnv_occ.h @@ -23,6 +23,8 @@ #define TYPE_PNV_OCC "pnv-occ" #define PNV_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV_OCC) +#define TYPE_PNV8_OCC TYPE_PNV_OCC "-POWER8" +#define PNV8_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV8_OCC) typedef struct PnvOCC { DeviceState xd; @@ -35,4 +37,17 @@ typedef struct PnvOCC { MemoryRegion xscom_regs; } PnvOCC; +#define PNV_OCC_CLASS(klass) \ + OBJECT_CLASS_CHECK(PnvOCCClass, (klass), TYPE_PNV_OCC) +#define PNV_OCC_GET_CLASS(obj) \ + OBJECT_GET_CLASS(PnvOCCClass, (obj), TYPE_PNV_OCC) + +typedef struct PnvOCCClass { + DeviceClass parent_class; + + int xscom_size; + const MemoryRegionOps *xscom_ops; + int psi_irq; +} PnvOCCClass; + #endif /* _PPC_PNV_OCC_H */ |