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-rw-r--r--hw/ac97.c7
-rw-r--r--hw/acpi.c6
-rw-r--r--hw/apb_pci.c6
-rw-r--r--hw/cirrus_vga.c9
-rw-r--r--hw/e1000.c4
-rw-r--r--hw/eepro100.c4
-rw-r--r--hw/es1370.c6
-rw-r--r--hw/grackle_pci.c6
-rw-r--r--hw/gt64xxx.c6
-rw-r--r--hw/ide.c18
-rw-r--r--hw/lsi53c895a.c19
-rw-r--r--hw/macio.c7
-rw-r--r--hw/ne2000.c6
-rw-r--r--hw/openpic.c6
-rw-r--r--hw/pci.h70
-rw-r--r--hw/pcnet.c4
-rw-r--r--hw/piix_pci.c18
-rw-r--r--hw/ppc4xx_pci.c12
-rw-r--r--hw/prep_pci.c6
-rw-r--r--hw/rtl8139.c10
-rw-r--r--hw/sh_pci.c6
-rw-r--r--hw/sun4u.c6
-rw-r--r--hw/unin_pci.c24
-rw-r--r--hw/usb-ohci.c8
-rw-r--r--hw/usb-uhci.c12
-rw-r--r--hw/versatile_pci.c6
-rw-r--r--hw/vga.c6
-rw-r--r--hw/virtio.c6
-rw-r--r--hw/vmware_vga.c12
29 files changed, 157 insertions, 159 deletions
diff --git a/hw/ac97.c b/hw/ac97.c
index dc9a165..3a256a9 100644
--- a/hw/ac97.c
+++ b/hw/ac97.c
@@ -1336,11 +1336,8 @@ int ac97_init (PCIBus *bus, AudioState *audio)
s = &d->ac97;
s->pci_dev = &d->dev;
c = d->dev.config;
- c[0x00] = 0x86; /* vid vendor id intel ro */
- c[0x01] = 0x80; /* intel */
-
- c[0x02] = 0x15; /* did device id 82801 ro */
- c[0x03] = 0x24; /* 82801aa */
+ pci_config_set_vendor_id(c, PCI_VENDOR_ID_INTEL); /* ro */
+ pci_config_set_device_id(c, PCI_DEVICE_ID_INTEL_82801AA_5); /* ro */
c[0x04] = 0x00; /* pcicmd pci command rw, ro */
c[0x05] = 0x00;
diff --git a/hw/acpi.c b/hw/acpi.c
index c127d4c..78e8d08 100644
--- a/hw/acpi.c
+++ b/hw/acpi.c
@@ -503,10 +503,8 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
devfn, NULL, pm_write_config);
pm_state = s;
pci_conf = s->dev.config;
- pci_conf[0x00] = 0x86;
- pci_conf[0x01] = 0x80;
- pci_conf[0x02] = 0x13;
- pci_conf[0x03] = 0x71;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_3);
pci_conf[0x06] = 0x80;
pci_conf[0x07] = 0x02;
pci_conf[0x08] = 0x03; // revision number
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index f222f3c..a1ba7fd 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -252,10 +252,8 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
d = pci_register_device(s->bus, "Advanced PCI Bus", sizeof(PCIDevice),
0, NULL, NULL);
- d->config[0x00] = 0x8e; // vendor_id : Sun
- d->config[0x01] = 0x10;
- d->config[0x02] = 0x00; // device_id
- d->config[0x03] = 0xa0;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_SUN);
+ pci_config_set_device_id(d->config, PCI_DEVICE_ID_SUN_SABRE);
d->config[0x04] = 0x06; // command = bus master, pci mem
d->config[0x05] = 0x00;
d->config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index 8f93911..e8ea7a8 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -173,8 +173,7 @@
#define CIRRUS_MMIO_LINEDRAW_MODE 0x39 // byte
#define CIRRUS_MMIO_BLTSTATUS 0x40 // byte
-// PCI 0x00: vendor, 0x02: device
-#define PCI_VENDOR_CIRRUS 0x1013
+// PCI 0x02: device
#define PCI_DEVICE_CLGD5462 0x00d0
#define PCI_DEVICE_CLGD5465 0x00d6
@@ -3376,10 +3375,8 @@ void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
sizeof(PCICirrusVGAState),
-1, NULL, pci_cirrus_write_config);
pci_conf = d->dev.config;
- pci_conf[0x00] = (uint8_t) (PCI_VENDOR_CIRRUS & 0xff);
- pci_conf[0x01] = (uint8_t) (PCI_VENDOR_CIRRUS >> 8);
- pci_conf[0x02] = (uint8_t) (device_id & 0xff);
- pci_conf[0x03] = (uint8_t) (device_id >> 8);
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CIRRUS);
+ pci_config_set_device_id(pci_conf, device_id);
pci_conf[0x04] = PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS;
pci_conf[0x0a] = PCI_CLASS_SUB_VGA;
pci_conf[0x0b] = PCI_CLASS_BASE_DISPLAY;
diff --git a/hw/e1000.c b/hw/e1000.c
index ccf9bc0..a38ab73 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -1049,8 +1049,8 @@ pci_e1000_init(PCIBus *bus, NICInfo *nd, int devfn)
pci_conf = d->dev.config;
memset(pci_conf, 0, 256);
- *(uint16_t *)(pci_conf+0x00) = cpu_to_le16(0x8086);
- *(uint16_t *)(pci_conf+0x02) = cpu_to_le16(E1000_DEVID);
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, E1000_DEVID);
*(uint16_t *)(pci_conf+0x04) = cpu_to_le16(0x0407);
*(uint16_t *)(pci_conf+0x06) = cpu_to_le16(0x0010);
pci_conf[0x08] = 0x03;
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 5eca105..96a6804 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -422,9 +422,9 @@ static void pci_reset(EEPRO100State * s)
logout("%p\n", s);
/* PCI Vendor ID */
- PCI_CONFIG_16(PCI_VENDOR_ID, 0x8086);
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
/* PCI Device ID */
- PCI_CONFIG_16(PCI_DEVICE_ID, 0x1209);
+ pci_config_set_device_id(pci_conf, 0x1209);
/* PCI Command */
PCI_CONFIG_16(PCI_COMMAND, 0x0000);
/* PCI Status */
diff --git a/hw/es1370.c b/hw/es1370.c
index bad237d..ddd00d8 100644
--- a/hw/es1370.c
+++ b/hw/es1370.c
@@ -1031,10 +1031,8 @@ int es1370_init (PCIBus *bus, AudioState *audio)
}
c = d->dev.config;
- c[0x00] = 0x74;
- c[0x01] = 0x12;
- c[0x02] = 0x00;
- c[0x03] = 0x50;
+ pci_config_set_vendor_id(c, PCI_VENDOR_ID_ENSONIQ);
+ pci_config_set_device_id(c, PCI_DEVICE_ID_ENSONIQ_ES1370);
c[0x07] = 2 << 1;
c[0x0a] = 0x01;
c[0x0b] = 0x04;
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index f875e5d..9a5f3e5 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -144,10 +144,8 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
cpu_register_physical_memory(base + 0x00200000, 0x1000, pci_mem_data);
d = pci_register_device(s->bus, "Grackle host bridge", sizeof(PCIDevice),
0, NULL, NULL);
- d->config[0x00] = 0x57; // vendor_id
- d->config[0x01] = 0x10;
- d->config[0x02] = 0x02; // device_id
- d->config[0x03] = 0x00;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA);
+ pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_MPC106);
d->config[0x08] = 0x00; // revision
d->config[0x09] = 0x01;
d->config[0x0a] = 0x00; // class_sub = host
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index b6cd971..f9e6e0c 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -1136,10 +1136,8 @@ PCIBus *pci_gt64120_init(qemu_irq *pic)
/* FIXME: Malta specific hw assumptions ahead */
- d->config[0x00] = 0xab; /* vendor_id */
- d->config[0x01] = 0x11;
- d->config[0x02] = 0x20; /* device_id */
- d->config[0x03] = 0x46;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MARVELL);
+ pci_config_set_device_id(d->config, 0x4620); /* device_id */
d->config[0x04] = 0x00;
d->config[0x05] = 0x00;
diff --git a/hw/ide.c b/hw/ide.c
index cfdee6c..c0e357b 100644
--- a/hw/ide.c
+++ b/hw/ide.c
@@ -3342,10 +3342,8 @@ void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
NULL, NULL);
d->type = IDE_TYPE_CMD646;
pci_conf = d->dev.config;
- pci_conf[0x00] = 0x95; // CMD646
- pci_conf[0x01] = 0x10;
- pci_conf[0x02] = 0x46;
- pci_conf[0x03] = 0x06;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CMD);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_CMD_646);
pci_conf[0x08] = 0x07; // IDE controller revision
pci_conf[0x09] = 0x8f;
@@ -3417,10 +3415,8 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
d->type = IDE_TYPE_PIIX3;
pci_conf = d->dev.config;
- pci_conf[0x00] = 0x86; // Intel
- pci_conf[0x01] = 0x80;
- pci_conf[0x02] = 0x10;
- pci_conf[0x03] = 0x70;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_1);
pci_conf[0x09] = 0x80; // legacy ATA mode
pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
@@ -3456,10 +3452,8 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
d->type = IDE_TYPE_PIIX4;
pci_conf = d->dev.config;
- pci_conf[0x00] = 0x86; // Intel
- pci_conf[0x01] = 0x80;
- pci_conf[0x02] = 0x11;
- pci_conf[0x03] = 0x71;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB);
pci_conf[0x09] = 0x80; // legacy ATA mode
pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 9f50dcb..021fe88 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -1963,6 +1963,7 @@ void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id)
void *lsi_scsi_init(PCIBus *bus, int devfn)
{
LSIState *s;
+ uint8_t *pci_conf;
s = (LSIState *)pci_register_device(bus, "LSI53C895A SCSI HBA",
sizeof(*s), devfn, NULL, NULL);
@@ -1971,21 +1972,21 @@ void *lsi_scsi_init(PCIBus *bus, int devfn)
return NULL;
}
+ pci_conf = s->pci_dev.config;
+
/* PCI Vendor ID (word) */
- s->pci_dev.config[0x00] = 0x00;
- s->pci_dev.config[0x01] = 0x10;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_LSI_LOGIC);
/* PCI device ID (word) */
- s->pci_dev.config[0x02] = 0x12;
- s->pci_dev.config[0x03] = 0x00;
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_LSI_53C895A);
/* PCI base class code */
- s->pci_dev.config[0x0b] = 0x01;
+ pci_conf[0x0b] = 0x01;
/* PCI subsystem ID */
- s->pci_dev.config[0x2e] = 0x00;
- s->pci_dev.config[0x2f] = 0x10;
+ pci_conf[0x2e] = 0x00;
+ pci_conf[0x2f] = 0x10;
/* PCI latency timer = 255 */
- s->pci_dev.config[0x0d] = 0xff;
+ pci_conf[0x0d] = 0xff;
/* Interrupt pin 1 */
- s->pci_dev.config[0x3d] = 0x01;
+ pci_conf[0x3d] = 0x01;
s->mmio_io_addr = cpu_register_io_memory(0, lsi_mmio_readfn,
lsi_mmio_writefn, s);
diff --git a/hw/macio.c b/hw/macio.c
index 2a98dfb..f97dc2b 100644
--- a/hw/macio.c
+++ b/hw/macio.c
@@ -106,10 +106,9 @@ void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
macio_state->ide_mem_index[i] = -1;
/* Note: this code is strongly inspirated from the corresponding code
in PearPC */
- d->config[0x00] = 0x6b; // vendor_id
- d->config[0x01] = 0x10;
- d->config[0x02] = device_id;
- d->config[0x03] = device_id >> 8;
+
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
+ pci_config_set_device_id(d->config, device_id);
d->config[0x0a] = 0x00; // class_sub = pci2pci
d->config[0x0b] = 0xff; // class_base = bridge
diff --git a/hw/ne2000.c b/hw/ne2000.c
index a85730f..af22f6e 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -790,10 +790,8 @@ void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn)
devfn,
NULL, NULL);
pci_conf = d->dev.config;
- pci_conf[0x00] = 0xec; // Realtek 8029
- pci_conf[0x01] = 0x10;
- pci_conf[0x02] = 0x29;
- pci_conf[0x03] = 0x80;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK);
+ pci_config_set_device_id(pci_conf, 0x8029); // Realtek 8029
pci_conf[0x0a] = 0x00; // ethernet network controller
pci_conf[0x0b] = 0x02;
pci_conf[0x0e] = 0x00; // header_type
diff --git a/hw/openpic.c b/hw/openpic.c
index b8da4d7..06a26df 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -1017,10 +1017,8 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
if (opp == NULL)
return NULL;
pci_conf = opp->pci_dev.config;
- pci_conf[0x00] = 0x14; // IBM MPIC2
- pci_conf[0x01] = 0x10;
- pci_conf[0x02] = 0xFF;
- pci_conf[0x03] = 0xFF;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
+ pci_config_set_device_id(pci_conf, 0xffff); // MPIC2
pci_conf[0x0a] = 0x80; // PIC
pci_conf[0x0b] = 0x08;
pci_conf[0x0e] = 0x00; // header_type
diff --git a/hw/pci.h b/hw/pci.h
index a94fd44..b3507b7 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -8,7 +8,63 @@
extern target_phys_addr_t pci_mem_base;
-/* see pci-ids.txt */
+#define PCI_VENDOR_ID_LSI_LOGIC 0x1000
+#define PCI_DEVICE_ID_LSI_53C895A 0x0012
+
+#define PCI_VENDOR_ID_DEC 0x1011
+
+#define PCI_VENDOR_ID_CIRRUS 0x1013
+
+#define PCI_VENDOR_ID_IBM 0x1014
+
+#define PCI_VENDOR_ID_AMD 0x1022
+#define PCI_DEVICE_ID_AMD_LANCE 0x2000
+
+#define PCI_VENDOR_ID_HITACHI 0x1054
+
+#define PCI_VENDOR_ID_MOTOROLA 0x1057
+#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
+#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
+
+#define PCI_VENDOR_ID_APPLE 0x106b
+#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
+
+#define PCI_VENDOR_ID_SUN 0x108e
+#define PCI_DEVICE_ID_SUN_EBUS 0x1000
+#define PCI_DEVICE_ID_SUN_SABRE 0xa000
+
+#define PCI_VENDOR_ID_CMD 0x1095
+#define PCI_DEVICE_ID_CMD_646 0x0646
+
+#define PCI_VENDOR_ID_REALTEK 0x10ec
+#define PCI_DEVICE_ID_REALTEK_8139 0x8139
+
+#define PCI_VENDOR_ID_XILINX 0x10ee
+
+#define PCI_VENDOR_ID_MARVELL 0x11ab
+
+#define PCI_VENDOR_ID_ENSONIQ 0x1274
+#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
+
+#define PCI_VENDOR_ID_VMWARE 0x15ad
+#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
+#define PCI_DEVICE_ID_VMWARE_SVGA 0x0710
+#define PCI_DEVICE_ID_VMWARE_NET 0x0720
+#define PCI_DEVICE_ID_VMWARE_SCSI 0x0730
+#define PCI_DEVICE_ID_VMWARE_IDE 0x1729
+
+#define PCI_VENDOR_ID_INTEL 0x8086
+#define PCI_DEVICE_ID_INTEL_82441 0x1237
+#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415
+#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
+#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
+#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
+#define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110
+#define PCI_DEVICE_ID_INTEL_82371AB 0x7111
+#define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112
+#define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113
+
+/* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */
#define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4
#define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4
#define PCI_SUBDEVICE_ID_QEMU 0x1100
@@ -130,6 +186,18 @@ void pci_info(void);
PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
pci_map_irq_fn map_irq, const char *name);
+static inline void
+pci_config_set_vendor_id(uint8_t *pci_config, uint16_t val)
+{
+ cpu_to_le16wu((uint16_t *)&pci_config[PCI_VENDOR_ID], val);
+}
+
+static inline void
+pci_config_set_device_id(uint8_t *pci_config, uint16_t val)
+{
+ cpu_to_le16wu((uint16_t *)&pci_config[PCI_DEVICE_ID], val);
+}
+
/* lsi53c895a.c */
#define LSI_MAX_DEVS 7
void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
diff --git a/hw/pcnet.c b/hw/pcnet.c
index 4411f75..e348222 100644
--- a/hw/pcnet.c
+++ b/hw/pcnet.c
@@ -2000,8 +2000,8 @@ void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn)
pci_conf = d->dev.config;
- *(uint16_t *)&pci_conf[0x00] = cpu_to_le16(0x1022);
- *(uint16_t *)&pci_conf[0x02] = cpu_to_le16(0x2000);
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_AMD);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_AMD_LANCE);
*(uint16_t *)&pci_conf[0x04] = cpu_to_le16(0x0007);
*(uint16_t *)&pci_conf[0x06] = cpu_to_le16(0x0280);
pci_conf[0x08] = 0x10;
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 1d6bf20..c5e73c2 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -192,10 +192,8 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
d = pci_register_device(b, "i440FX", sizeof(PCIDevice), 0,
NULL, i440fx_write_config);
- d->config[0x00] = 0x86; // vendor_id
- d->config[0x01] = 0x80;
- d->config[0x02] = 0x37; // device_id
- d->config[0x03] = 0x12;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82441);
d->config[0x08] = 0x02; // revision
d->config[0x0a] = 0x00; // class_sub = host2pci
d->config[0x0b] = 0x06; // class_base = PCI_bridge
@@ -337,10 +335,8 @@ int piix3_init(PCIBus *bus, int devfn)
piix3_dev = d;
pci_conf = d->config;
- pci_conf[0x00] = 0x86; // Intel
- pci_conf[0x01] = 0x80;
- pci_conf[0x02] = 0x00; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
- pci_conf[0x03] = 0x70;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_0); // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA
pci_conf[0x0b] = 0x06; // class_base = PCI_bridge
pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
@@ -361,10 +357,8 @@ int piix4_init(PCIBus *bus, int devfn)
piix4_dev = d;
pci_conf = d->config;
- pci_conf[0x00] = 0x86; // Intel
- pci_conf[0x01] = 0x80;
- pci_conf[0x02] = 0x10; // 82371AB/EB/MB PIIX4 PCI-to-ISA bridge
- pci_conf[0x03] = 0x71;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_0); // 82371AB/EB/MB PIIX4 PCI-to-ISA bridge
pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA
pci_conf[0x0b] = 0x06; // class_base = PCI_bridge
pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index b21c2fe..7d40b91 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -366,6 +366,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
PPC4xxPCIState *controller;
int index;
static int ppc4xx_pci_id;
+ uint8_t *pci_conf;
controller = qemu_mallocz(sizeof(PPC4xxPCIState));
if (!controller)
@@ -378,12 +379,11 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
controller->pci_dev = pci_register_device(controller->pci_state.bus,
"host bridge", sizeof(PCIDevice),
0, NULL, NULL);
- controller->pci_dev->config[0x00] = 0x14; // vendor_id
- controller->pci_dev->config[0x01] = 0x10;
- controller->pci_dev->config[0x02] = 0x7f; // device_id
- controller->pci_dev->config[0x03] = 0x02;
- controller->pci_dev->config[0x0a] = 0x80; // class_sub = other bridge type
- controller->pci_dev->config[0x0b] = 0x06; // class_base = PCI_bridge
+ pci_conf = controller->pci_dev->config;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
+ pci_config_set_device_id(pci_conf, 0x027f); // device_id
+ pci_conf[0x0a] = 0x80; // class_sub = other bridge type
+ pci_conf[0x0b] = 0x06; // class_base = PCI_bridge
/* CFGADDR */
index = cpu_register_io_memory(0, pci4xx_cfgaddr_read,
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index dd53f87..39c812d 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -155,10 +155,8 @@ PCIBus *pci_prep_init(qemu_irq *pic)
/* PCI host bridge */
d = pci_register_device(s->bus, "PREP Host Bridge - Motorola Raven",
sizeof(PCIDevice), 0, NULL, NULL);
- d->config[0x00] = 0x57; // vendor_id : Motorola
- d->config[0x01] = 0x10;
- d->config[0x02] = 0x01; // device_id : Raven
- d->config[0x03] = 0x48;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA);
+ pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_RAVEN);
d->config[0x08] = 0x00; // revision
d->config[0x0A] = 0x00; // class_sub = pci host
d->config[0x0B] = 0x06; // class_base = PCI_bridge
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index 70cb080..d88fb52 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -1187,8 +1187,8 @@ static void rtl8139_reset(RTL8139State *s)
s->eeprom.contents[0] = 0x8129;
#if 1
// PCI vendor and device ID should be mirrored here
- s->eeprom.contents[1] = 0x10ec;
- s->eeprom.contents[2] = 0x8139;
+ s->eeprom.contents[1] = PCI_VENDOR_ID_REALTEK;
+ s->eeprom.contents[2] = PCI_DEVICE_ID_REALTEK_8139;
#endif
s->eeprom.contents[7] = s->macaddr[0] | s->macaddr[1] << 8;
@@ -3425,10 +3425,8 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn)
devfn,
NULL, NULL);
pci_conf = d->dev.config;
- pci_conf[0x00] = 0xec; /* Realtek 8139 */
- pci_conf[0x01] = 0x10;
- pci_conf[0x02] = 0x39;
- pci_conf[0x03] = 0x81;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_8139);
pci_conf[0x04] = 0x05; /* command = I/O space, Bus Master */
pci_conf[0x08] = RTL8139_PCI_REVID; /* PCI revision ID; >=0x20 is for 8139C+ */
pci_conf[0x0a] = 0x00; /* ethernet network controller */
diff --git a/hw/sh_pci.c b/hw/sh_pci.c
index 9f89f2d..8e3fce0 100644
--- a/hw/sh_pci.c
+++ b/hw/sh_pci.c
@@ -188,10 +188,8 @@ PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
cpu_register_physical_memory(0xfe240000, 0x40000, iop);
cpu_register_physical_memory(0xfd000000, 0x1000000, mem);
- p->dev->config[0x00] = 0x54; // HITACHI
- p->dev->config[0x01] = 0x10; //
- p->dev->config[0x02] = 0x0e; // SH7751R
- p->dev->config[0x03] = 0x35; //
+ pci_config_set_vendor_id(p->dev->config, PCI_VENDOR_ID_HITACHI);
+ pci_config_set_device_id(p->dev->config, 0x350e); // SH7751R
p->dev->config[0x04] = 0x80;
p->dev->config[0x05] = 0x00;
p->dev->config[0x06] = 0x90;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index 59aee1b..ac6bf0e 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -365,10 +365,8 @@ pci_ebus_init(PCIBus *bus, int devfn)
PCIDevice *s;
s = pci_register_device(bus, "EBUS", sizeof(*s), devfn, NULL, NULL);
- s->config[0x00] = 0x8e; // vendor_id : Sun
- s->config[0x01] = 0x10;
- s->config[0x02] = 0x00; // device_id
- s->config[0x03] = 0x10;
+ pci_config_set_vendor_id(s->config, PCI_VENDOR_ID_SUN);
+ pci_config_set_device_id(s->config, PCI_DEVICE_ID_SUN_EBUS);
s->config[0x04] = 0x06; // command = bus master, pci mem
s->config[0x05] = 0x00;
s->config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index a835e17..4ada4ca 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -174,10 +174,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
cpu_register_physical_memory(0xf2c00000, 0x1000, pci_mem_data);
d = pci_register_device(s->bus, "Uni-north main", sizeof(PCIDevice),
11 << 3, NULL, NULL);
- d->config[0x00] = 0x6b; // vendor_id : Apple
- d->config[0x01] = 0x10;
- d->config[0x02] = 0x1F; // device_id
- d->config[0x03] = 0x00;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
+ pci_config_set_device_id(d->config, 0x001f); // device_id
d->config[0x08] = 0x00; // revision
d->config[0x0A] = 0x00; // class_sub = pci host
d->config[0x0B] = 0x06; // class_base = PCI_bridge
@@ -190,10 +188,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
/* pci-to-pci bridge */
d = pci_register_device("Uni-north bridge", sizeof(PCIDevice), 0, 13 << 3,
NULL, NULL);
- d->config[0x00] = 0x11; // vendor_id : TI
- d->config[0x01] = 0x10;
- d->config[0x02] = 0x26; // device_id
- d->config[0x03] = 0x00;
+ pci_config_set_vendor_id(d->config, 0x1011); // vendor_id : TI
+ pci_config_set_device_id(d->config, 0x0026); // device_id
d->config[0x08] = 0x05; // revision
d->config[0x0A] = 0x04; // class_sub = pci2pci
d->config[0x0B] = 0x06; // class_base = PCI_bridge
@@ -229,10 +225,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
d = pci_register_device("Uni-north AGP", sizeof(PCIDevice), 0, 11 << 3,
NULL, NULL);
- d->config[0x00] = 0x6b; // vendor_id : Apple
- d->config[0x01] = 0x10;
- d->config[0x02] = 0x20; // device_id
- d->config[0x03] = 0x00;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
+ pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP);
d->config[0x08] = 0x00; // revision
d->config[0x0A] = 0x00; // class_sub = pci host
d->config[0x0B] = 0x06; // class_base = PCI_bridge
@@ -254,10 +248,8 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
d = pci_register_device("Uni-north internal", sizeof(PCIDevice),
3, 11 << 3, NULL, NULL);
- d->config[0x00] = 0x6b; // vendor_id : Apple
- d->config[0x01] = 0x10;
- d->config[0x02] = 0x1E; // device_id
- d->config[0x03] = 0x00;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
+ pci_config_set_device_id(d->config, 0x001E); // device_id
d->config[0x08] = 0x00; // revision
d->config[0x0A] = 0x00; // class_sub = pci host
d->config[0x0B] = 0x06; // class_base = PCI_bridge
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index f35685d..e3d8db6 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -1671,8 +1671,6 @@ static void ohci_mapfunc(PCIDevice *pci_dev, int i,
void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn)
{
OHCIPCIState *ohci;
- int vid = 0x106b;
- int did = 0x003f;
ohci = (OHCIPCIState *)pci_register_device(bus, "OHCI USB", sizeof(*ohci),
devfn, NULL, NULL);
@@ -1681,10 +1679,8 @@ void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn)
return;
}
- ohci->pci_dev.config[0x00] = vid & 0xff;
- ohci->pci_dev.config[0x01] = (vid >> 8) & 0xff;
- ohci->pci_dev.config[0x02] = did & 0xff;
- ohci->pci_dev.config[0x03] = (did >> 8) & 0xff;
+ pci_config_set_vendor_id(ohci->pci_dev.config, PCI_VENDOR_ID_APPLE);
+ pci_config_set_device_id(ohci->pci_dev.config, 0x003f); // device_id
ohci->pci_dev.config[0x09] = 0x10; /* OHCI */
ohci->pci_dev.config[0x0a] = 0x3;
ohci->pci_dev.config[0x0b] = 0xc;
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index b90cf78..5512189 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1080,10 +1080,8 @@ void usb_uhci_piix3_init(PCIBus *bus, int devfn)
"USB-UHCI", sizeof(UHCIState),
devfn, NULL, NULL);
pci_conf = s->dev.config;
- pci_conf[0x00] = 0x86;
- pci_conf[0x01] = 0x80;
- pci_conf[0x02] = 0x20;
- pci_conf[0x03] = 0x70;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_2);
pci_conf[0x08] = 0x01; // revision number
pci_conf[0x09] = 0x00;
pci_conf[0x0a] = 0x03;
@@ -1117,10 +1115,8 @@ void usb_uhci_piix4_init(PCIBus *bus, int devfn)
"USB-UHCI", sizeof(UHCIState),
devfn, NULL, NULL);
pci_conf = s->dev.config;
- pci_conf[0x00] = 0x86;
- pci_conf[0x01] = 0x80;
- pci_conf[0x02] = 0x12;
- pci_conf[0x03] = 0x71;
+ pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
+ pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_2);
pci_conf[0x08] = 0x01; // revision number
pci_conf[0x09] = 0x00;
pci_conf[0x0a] = 0x03;
diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index 1f4c1f3..13803fe 100644
--- a/hw/versatile_pci.c
+++ b/hw/versatile_pci.c
@@ -124,11 +124,9 @@ PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview)
isa_mmio_init(base + 0x03000000, 0x00100000);
}
- d->config[0x00] = 0xee; // vendor_id
- d->config[0x01] = 0x10;
+ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_XILINX);
/* Both boards have the same device ID. Oh well. */
- d->config[0x02] = 0x00; // device_id
- d->config[0x03] = 0x03;
+ pci_config_set_device_id(d->config, 0x0300); // device_id
d->config[0x04] = 0x00;
d->config[0x05] = 0x00;
d->config[0x06] = 0x20;
diff --git a/hw/vga.c b/hw/vga.c
index c9fef86..5a61c57 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -2512,10 +2512,8 @@ int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
s->pci_dev = &d->dev;
pci_conf = d->dev.config;
- pci_conf[0x00] = 0x34; // dummy VGA (same as Bochs ID)
- pci_conf[0x01] = 0x12;
- pci_conf[0x02] = 0x11;
- pci_conf[0x03] = 0x11;
+ pci_config_set_vendor_id(pci_conf, 0x1234); // dummy VGA (same as Bochs ID)
+ pci_config_set_device_id(pci_conf, 0x1111);
pci_conf[0x0a] = 0x00; // VGA controller
pci_conf[0x0b] = 0x03;
pci_conf[0x0e] = 0x00; // header_type
diff --git a/hw/virtio.c b/hw/virtio.c
index dba80f8..2e3984e 100644
--- a/hw/virtio.c
+++ b/hw/virtio.c
@@ -830,10 +830,8 @@ VirtIODevice *virtio_init_pci(PCIBus *bus, const char *name,
vdev->vq = qemu_mallocz(sizeof(VirtQueue) * VIRTIO_PCI_QUEUE_MAX);
config = pci_dev->config;
- config[0x00] = vendor & 0xFF;
- config[0x01] = (vendor >> 8) & 0xFF;
- config[0x02] = device & 0xFF;
- config[0x03] = (device >> 8) & 0xFF;
+ pci_config_set_vendor_id(config, vendor);
+ pci_config_set_device_id(config, device);
config[0x08] = VIRTIO_PCI_ABI_VERSION;
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index 950a98c..1f03886 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -1204,12 +1204,6 @@ static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
iomemtype);
}
-#define PCI_VENDOR_ID_VMWARE 0x15ad
-#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
-#define PCI_DEVICE_ID_VMWARE_SVGA 0x0710
-#define PCI_DEVICE_ID_VMWARE_NET 0x0720
-#define PCI_DEVICE_ID_VMWARE_SCSI 0x0730
-#define PCI_DEVICE_ID_VMWARE_IDE 0x1729
#define PCI_CLASS_BASE_DISPLAY 0x03
#define PCI_CLASS_SUB_VGA 0x00
#define PCI_CLASS_HEADERTYPE_00h 0x00
@@ -1223,10 +1217,8 @@ void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
s = (struct pci_vmsvga_state_s *)
pci_register_device(bus, "QEMUware SVGA",
sizeof(struct pci_vmsvga_state_s), -1, 0, 0);
- s->card.config[PCI_VENDOR_ID] = PCI_VENDOR_ID_VMWARE & 0xff;
- s->card.config[PCI_VENDOR_ID + 1] = PCI_VENDOR_ID_VMWARE >> 8;
- s->card.config[PCI_DEVICE_ID] = SVGA_PCI_DEVICE_ID & 0xff;
- s->card.config[PCI_DEVICE_ID + 1] = SVGA_PCI_DEVICE_ID >> 8;
+ pci_config_set_vendor_id(s->card.config, PCI_VENDOR_ID_VMWARE);
+ pci_config_set_device_id(s->card.config, SVGA_PCI_DEVICE_ID);
s->card.config[PCI_COMMAND] = 0x07; /* I/O + Memory */
s->card.config[PCI_CLASS_DEVICE] = PCI_CLASS_SUB_VGA;
s->card.config[0x0b] = PCI_CLASS_BASE_DISPLAY;
generated by cgit v1.1 at 2024-12-29 07:29:54 +0000