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-rw-r--r--target/mips/tcg/translate.c9
-rw-r--r--target/mips/tcg/translate.h5
2 files changed, 9 insertions, 5 deletions
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index b4a454e..3e99455 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -5629,8 +5629,7 @@ static void gen_align_bits(DisasContext *ctx, int wordsz, int rd, int rs,
tcg_temp_free(t0);
}
-static void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt,
- int bp)
+void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp)
{
gen_align_bits(ctx, wordsz, rd, rs, rt, bp * 8);
}
@@ -12778,8 +12777,8 @@ static void gen_mips16_restore(DisasContext *ctx,
tcg_temp_free(t2);
}
-static void gen_addiupc(DisasContext *ctx, int rx, int imm,
- int is_64_bit, int extended)
+void gen_addiupc(DisasContext *ctx, int rx, int imm,
+ int is_64_bit, int extended)
{
TCGv t0;
@@ -14510,7 +14509,7 @@ static void gen_pool16c_r6_insn(DisasContext *ctx)
}
}
-static void gen_ldxs(DisasContext *ctx, int base, int index, int rd)
+void gen_ldxs(DisasContext *ctx, int base, int index, int rd)
{
TCGv t0 = tcg_temp_new();
TCGv t1 = tcg_temp_new();
diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index 6144259..c25fad5 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -146,6 +146,11 @@ void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg);
void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg);
int get_fp_bit(int cc);
+void gen_ldxs(DisasContext *ctx, int base, int index, int rd);
+void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp);
+void gen_addiupc(DisasContext *ctx, int rx, int imm,
+ int is_64_bit, int extended);
+
/*
* Address Computation and Large Constant Instructions
*/