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-rw-r--r--target-alpha/cpu.c41
-rw-r--r--target-alpha/cpu.h2
2 files changed, 43 insertions, 0 deletions
diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c
index a5a98d0..2deb3c1 100644
--- a/target-alpha/cpu.c
+++ b/target-alpha/cpu.c
@@ -33,6 +33,47 @@ static void alpha_cpu_realize(Object *obj, Error **errp)
#endif
}
+typedef struct AlphaCPUListState {
+ fprintf_function cpu_fprintf;
+ FILE *file;
+} AlphaCPUListState;
+
+/* Sort alphabetically by type name. */
+static gint alpha_cpu_list_compare(gconstpointer a, gconstpointer b)
+{
+ ObjectClass *class_a = (ObjectClass *)a;
+ ObjectClass *class_b = (ObjectClass *)b;
+ const char *name_a, *name_b;
+
+ name_a = object_class_get_name(class_a);
+ name_b = object_class_get_name(class_b);
+ return strcmp(name_a, name_b);
+}
+
+static void alpha_cpu_list_entry(gpointer data, gpointer user_data)
+{
+ ObjectClass *oc = data;
+ AlphaCPUListState *s = user_data;
+
+ (*s->cpu_fprintf)(s->file, " %s\n",
+ object_class_get_name(oc));
+}
+
+void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf)
+{
+ AlphaCPUListState s = {
+ .file = f,
+ .cpu_fprintf = cpu_fprintf,
+ };
+ GSList *list;
+
+ list = object_class_get_list(TYPE_ALPHA_CPU, false);
+ list = g_slist_sort(list, alpha_cpu_list_compare);
+ (*cpu_fprintf)(f, "Available CPUs:\n");
+ g_slist_foreach(list, alpha_cpu_list_entry, &s);
+ g_slist_free(list);
+}
+
/* Models */
#define TYPE(model) model "-" TYPE_ALPHA_CPU
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 0d08458..23f06c5 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -289,6 +289,7 @@ struct CPUAlphaState {
int implver;
};
+#define cpu_list alpha_cpu_list
#define cpu_exec cpu_alpha_exec
#define cpu_gen_code cpu_alpha_gen_code
#define cpu_signal_handler cpu_alpha_signal_handler
@@ -438,6 +439,7 @@ static inline CPUAlphaState *cpu_init(const char *cpu_model)
return &cpu->env;
}
+void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf);
int cpu_alpha_exec(CPUAlphaState *s);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero