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-rw-r--r--target/sh4/cpu-qom.h6
-rw-r--r--target/sh4/cpu.c63
-rw-r--r--target/sh4/cpu.h3
3 files changed, 31 insertions, 41 deletions
diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h
index 01abb20..17deeb6 100644
--- a/target/sh4/cpu-qom.h
+++ b/target/sh4/cpu-qom.h
@@ -24,9 +24,9 @@
#define TYPE_SUPERH_CPU "superh-cpu"
-#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU
-#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU
-#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU
+#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r")
+#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r")
+#define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785")
#define SUPERH_CPU_CLASS(klass) \
OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 89abce2..ec6db61 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -172,13 +172,6 @@ static void sh7750r_class_init(ObjectClass *oc, void *data)
scc->cvr = 0x00110000;
}
-static const TypeInfo sh7750r_type_info = {
- .name = TYPE_SH7750R_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7750r_class_init,
- .instance_init = sh7750r_cpu_initfn,
-};
-
static void sh7751r_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -198,13 +191,6 @@ static void sh7751r_class_init(ObjectClass *oc, void *data)
scc->cvr = 0x00110000; /* Neutered caches, should be 0x20480000 */
}
-static const TypeInfo sh7751r_type_info = {
- .name = TYPE_SH7751R_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7751r_class_init,
- .instance_init = sh7751r_cpu_initfn,
-};
-
static void sh7785_cpu_initfn(Object *obj)
{
SuperHCPU *cpu = SUPERH_CPU(obj);
@@ -224,13 +210,6 @@ static void sh7785_class_init(ObjectClass *oc, void *data)
scc->cvr = 0x71440211;
}
-static const TypeInfo sh7785_type_info = {
- .name = TYPE_SH7785_CPU,
- .parent = TYPE_SUPERH_CPU,
- .class_init = sh7785_class_init,
- .instance_init = sh7785_cpu_initfn,
-};
-
static void superh_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -300,22 +279,30 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
dc->vmsd = &vmstate_sh_cpu;
}
-static const TypeInfo superh_cpu_type_info = {
- .name = TYPE_SUPERH_CPU,
- .parent = TYPE_CPU,
- .instance_size = sizeof(SuperHCPU),
- .instance_init = superh_cpu_initfn,
- .abstract = true,
- .class_size = sizeof(SuperHCPUClass),
- .class_init = superh_cpu_class_init,
-};
+#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \
+ { \
+ .name = type_name, \
+ .parent = TYPE_SUPERH_CPU, \
+ .class_init = cinit, \
+ .instance_init = initfn, \
+ }
+static const TypeInfo superh_cpu_type_infos[] = {
+ {
+ .name = TYPE_SUPERH_CPU,
+ .parent = TYPE_CPU,
+ .instance_size = sizeof(SuperHCPU),
+ .instance_init = superh_cpu_initfn,
+ .abstract = true,
+ .class_size = sizeof(SuperHCPUClass),
+ .class_init = superh_cpu_class_init,
+ },
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init,
+ sh7750r_cpu_initfn),
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init,
+ sh7751r_cpu_initfn),
+ DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init,
+ sh7785_cpu_initfn),
-static void superh_cpu_register_types(void)
-{
- type_register_static(&superh_cpu_type_info);
- type_register_static(&sh7750r_type_info);
- type_register_static(&sh7751r_type_info);
- type_register_static(&sh7785_type_info);
-}
+};
-type_init(superh_cpu_register_types)
+DEFINE_TYPES(superh_cpu_type_infos)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 123f347..960b468 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -274,6 +274,9 @@ void cpu_load_tlb(CPUSH4State * env);
#define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)
+#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU
+#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX
+
#define cpu_signal_handler cpu_sh4_signal_handler
#define cpu_list sh4_cpu_list