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-rw-r--r--hw/arm/aspeed.c13
-rw-r--r--hw/misc/aspeed_sdmc.c83
-rw-r--r--include/hw/misc/aspeed_sdmc.h1
3 files changed, 70 insertions, 27 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index a17843f..805bebd 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -204,8 +204,12 @@ static void aspeed_machine_init(MachineState *machine)
sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
+ /*
+ * This will error out if isize is not supported by memory controller.
+ */
object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size",
- &error_abort);
+ &error_fatal);
+
object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1",
&error_abort);
object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2",
@@ -228,13 +232,6 @@ static void aspeed_machine_init(MachineState *machine)
object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
&error_abort);
- /*
- * Allocate RAM after the memory controller has checked the size
- * was valid. If not, a default value is used.
- */
- ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size",
- &error_abort);
-
memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram);
memory_region_add_subregion(get_system_memory(),
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 9c18479..7b466bf 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -17,6 +17,9 @@
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "trace.h"
+#include "qemu/units.h"
+#include "qemu/cutils.h"
+#include "qapi/visitor.h"
/* Protection Key Register */
#define R_PROT (0x00 / 4)
@@ -160,14 +163,9 @@ static int ast2400_rambits(AspeedSDMCState *s)
case 512:
return ASPEED_SDMC_DRAM_512MB;
default:
+ g_assert_not_reached();
break;
}
-
- /* use a common default */
- warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 256M",
- s->ram_size);
- s->ram_size = 256 << 20;
- return ASPEED_SDMC_DRAM_256MB;
}
static int ast2500_rambits(AspeedSDMCState *s)
@@ -182,14 +180,9 @@ static int ast2500_rambits(AspeedSDMCState *s)
case 1024:
return ASPEED_SDMC_AST2500_1024MB;
default:
+ g_assert_not_reached();
break;
}
-
- /* use a common default */
- warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 512M",
- s->ram_size);
- s->ram_size = 512 << 20;
- return ASPEED_SDMC_AST2500_512MB;
}
static int ast2600_rambits(AspeedSDMCState *s)
@@ -204,14 +197,9 @@ static int ast2600_rambits(AspeedSDMCState *s)
case 2048:
return ASPEED_SDMC_AST2600_2048MB;
default:
+ g_assert_not_reached();
break;
}
-
- /* use a common default */
- warn_report("Invalid RAM size 0x%" PRIx64 ". Using default 1024M",
- s->ram_size);
- s->ram_size = 1024 << 20;
- return ASPEED_SDMC_AST2600_1024MB;
}
static void aspeed_sdmc_reset(DeviceState *dev)
@@ -225,6 +213,51 @@ static void aspeed_sdmc_reset(DeviceState *dev)
s->regs[R_CONF] = asc->compute_conf(s, 0);
}
+static void aspeed_sdmc_get_ram_size(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ AspeedSDMCState *s = ASPEED_SDMC(obj);
+ int64_t value = s->ram_size;
+
+ visit_type_int(v, name, &value, errp);
+}
+
+static void aspeed_sdmc_set_ram_size(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ int i;
+ char *sz;
+ int64_t value;
+ Error *local_err = NULL;
+ AspeedSDMCState *s = ASPEED_SDMC(obj);
+ AspeedSDMCClass *asc = ASPEED_SDMC_GET_CLASS(s);
+
+ visit_type_int(v, name, &value, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
+ for (i = 0; asc->valid_ram_sizes[i]; i++) {
+ if (value == asc->valid_ram_sizes[i]) {
+ s->ram_size = value;
+ return;
+ }
+ }
+
+ sz = size_to_str(value);
+ error_setg(&local_err, "Invalid RAM size %s", sz);
+ g_free(sz);
+ error_propagate(errp, local_err);
+}
+
+static void aspeed_sdmc_initfn(Object *obj)
+{
+ object_property_add(obj, "ram-size", "int",
+ aspeed_sdmc_get_ram_size, aspeed_sdmc_set_ram_size,
+ NULL, NULL, NULL);
+}
+
static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
{
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
@@ -249,7 +282,6 @@ static const VMStateDescription vmstate_aspeed_sdmc = {
};
static Property aspeed_sdmc_properties[] = {
- DEFINE_PROP_UINT64("ram-size", AspeedSDMCState, ram_size, 0),
DEFINE_PROP_UINT64("max-ram-size", AspeedSDMCState, max_ram_size, 0),
DEFINE_PROP_END_OF_LIST(),
};
@@ -268,6 +300,7 @@ static const TypeInfo aspeed_sdmc_info = {
.name = TYPE_ASPEED_SDMC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(AspeedSDMCState),
+ .instance_init = aspeed_sdmc_initfn,
.class_init = aspeed_sdmc_class_init,
.class_size = sizeof(AspeedSDMCClass),
.abstract = true,
@@ -298,6 +331,9 @@ static void aspeed_2400_sdmc_write(AspeedSDMCState *s, uint32_t reg,
s->regs[reg] = data;
}
+static const uint64_t
+aspeed_2400_ram_sizes[] = { 64 * MiB, 128 * MiB, 256 * MiB, 512 * MiB, 0};
+
static void aspeed_2400_sdmc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -307,6 +343,7 @@ static void aspeed_2400_sdmc_class_init(ObjectClass *klass, void *data)
asc->max_ram_size = 512 << 20;
asc->compute_conf = aspeed_2400_sdmc_compute_conf;
asc->write = aspeed_2400_sdmc_write;
+ asc->valid_ram_sizes = aspeed_2400_ram_sizes;
}
static const TypeInfo aspeed_2400_sdmc_info = {
@@ -351,6 +388,9 @@ static void aspeed_2500_sdmc_write(AspeedSDMCState *s, uint32_t reg,
s->regs[reg] = data;
}
+static const uint64_t
+aspeed_2500_ram_sizes[] = { 128 * MiB, 256 * MiB, 512 * MiB, 1024 * MiB, 0};
+
static void aspeed_2500_sdmc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -360,6 +400,7 @@ static void aspeed_2500_sdmc_class_init(ObjectClass *klass, void *data)
asc->max_ram_size = 1024 << 20;
asc->compute_conf = aspeed_2500_sdmc_compute_conf;
asc->write = aspeed_2500_sdmc_write;
+ asc->valid_ram_sizes = aspeed_2500_ram_sizes;
}
static const TypeInfo aspeed_2500_sdmc_info = {
@@ -404,6 +445,9 @@ static void aspeed_2600_sdmc_write(AspeedSDMCState *s, uint32_t reg,
s->regs[reg] = data;
}
+static const uint64_t
+aspeed_2600_ram_sizes[] = { 256 * MiB, 512 * MiB, 1024 * MiB, 2048 * MiB, 0};
+
static void aspeed_2600_sdmc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -413,6 +457,7 @@ static void aspeed_2600_sdmc_class_init(ObjectClass *klass, void *data)
asc->max_ram_size = 2048 << 20;
asc->compute_conf = aspeed_2600_sdmc_compute_conf;
asc->write = aspeed_2600_sdmc_write;
+ asc->valid_ram_sizes = aspeed_2600_ram_sizes;
}
static const TypeInfo aspeed_2600_sdmc_info = {
diff --git a/include/hw/misc/aspeed_sdmc.h b/include/hw/misc/aspeed_sdmc.h
index 5dbde59..cea1e67 100644
--- a/include/hw/misc/aspeed_sdmc.h
+++ b/include/hw/misc/aspeed_sdmc.h
@@ -40,6 +40,7 @@ typedef struct AspeedSDMCClass {
SysBusDeviceClass parent_class;
uint64_t max_ram_size;
+ const uint64_t *valid_ram_sizes;
uint32_t (*compute_conf)(AspeedSDMCState *s, uint32_t data);
void (*write)(AspeedSDMCState *s, uint32_t reg, uint32_t data);
} AspeedSDMCClass;
generated by cgit v1.1 at 2024-12-26 08:46:09 +0000