diff options
| -rw-r--r-- | hw/r2d.c | 2 | ||||
| -rw-r--r-- | hw/sh.h | 3 | ||||
| -rw-r--r-- | hw/sh7750.c | 72 | ||||
| -rw-r--r-- | hw/shix.c | 2 |
4 files changed, 49 insertions, 30 deletions
@@ -250,7 +250,7 @@ static void r2d_init(ram_addr_t ram_size, memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE); memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram); /* Register peripherals */ - s = sh7750_init(env); + s = sh7750_init(env, address_space_mem); irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s)); sysbus_create_varargs("sh_pci", 0x1e200000, irq[PCI_INTA], irq[PCI_INTB], irq[PCI_INTC], irq[PCI_INTD], NULL); @@ -9,8 +9,9 @@ /* sh7750.c */ struct SH7750State; +struct MemoryRegion; -struct SH7750State *sh7750_init(CPUState * cpu); +struct SH7750State *sh7750_init(CPUState * cpu, struct MemoryRegion *sysmem); typedef struct { /* The callback will be triggered if any of the designated lines change */ diff --git a/hw/sh7750.c b/hw/sh7750.c index 9f3ea92..3bf568d 100644 --- a/hw/sh7750.c +++ b/hw/sh7750.c @@ -30,10 +30,18 @@ #include "sh7750_regnames.h" #include "sh_intc.h" #include "cpu.h" +#include "exec-memory.h" #define NB_DEVICES 4 typedef struct SH7750State { + MemoryRegion iomem; + MemoryRegion iomem_1f0; + MemoryRegion iomem_ff0; + MemoryRegion iomem_1f8; + MemoryRegion iomem_ff8; + MemoryRegion iomem_1fc; + MemoryRegion iomem_ffc; /* CPU */ CPUSH4State *cpu; /* Peripheral frequency in Hz */ @@ -436,16 +444,16 @@ static void sh7750_mem_writel(void *opaque, target_phys_addr_t addr, } } -static CPUReadMemoryFunc * const sh7750_mem_read[] = { - sh7750_mem_readb, - sh7750_mem_readw, - sh7750_mem_readl -}; - -static CPUWriteMemoryFunc * const sh7750_mem_write[] = { - sh7750_mem_writeb, - sh7750_mem_writew, - sh7750_mem_writel +static const MemoryRegionOps sh7750_mem_ops = { + .old_mmio = { + .read = {sh7750_mem_readb, + sh7750_mem_readw, + sh7750_mem_readl }, + .write = {sh7750_mem_writeb, + sh7750_mem_writew, + sh7750_mem_writel }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; /* sh775x interrupt controller tables for sh_intc.c @@ -706,30 +714,40 @@ static CPUWriteMemoryFunc * const sh7750_mmct_write[] = { sh7750_mmct_writel }; -SH7750State *sh7750_init(CPUSH4State * cpu) +SH7750State *sh7750_init(CPUSH4State * cpu, MemoryRegion *sysmem) { SH7750State *s; - int sh7750_io_memory; int sh7750_mm_cache_and_tlb; /* memory mapped cache and tlb */ s = g_malloc0(sizeof(SH7750State)); s->cpu = cpu; s->periph_freq = 60000000; /* 60MHz */ - sh7750_io_memory = cpu_register_io_memory(sh7750_mem_read, - sh7750_mem_write, s, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory_offset(0x1f000000, 0x1000, - sh7750_io_memory, 0x1f000000); - cpu_register_physical_memory_offset(0xff000000, 0x1000, - sh7750_io_memory, 0x1f000000); - cpu_register_physical_memory_offset(0x1f800000, 0x1000, - sh7750_io_memory, 0x1f800000); - cpu_register_physical_memory_offset(0xff800000, 0x1000, - sh7750_io_memory, 0x1f800000); - cpu_register_physical_memory_offset(0x1fc00000, 0x1000, - sh7750_io_memory, 0x1fc00000); - cpu_register_physical_memory_offset(0xffc00000, 0x1000, - sh7750_io_memory, 0x1fc00000); + memory_region_init_io(&s->iomem, &sh7750_mem_ops, s, + "memory", 0x1fc01000); + + memory_region_init_alias(&s->iomem_1f0, "memory-1f0", + &s->iomem, 0x1f000000, 0x1000); + memory_region_add_subregion(sysmem, 0x1f000000, &s->iomem_1f0); + + memory_region_init_alias(&s->iomem_ff0, "memory-ff0", + &s->iomem, 0x1f000000, 0x1000); + memory_region_add_subregion(sysmem, 0xff000000, &s->iomem_ff0); + + memory_region_init_alias(&s->iomem_1f8, "memory-1f8", + &s->iomem, 0x1f800000, 0x1000); + memory_region_add_subregion(sysmem, 0x1f800000, &s->iomem_1f8); + + memory_region_init_alias(&s->iomem_ff8, "memory-ff8", + &s->iomem, 0x1f800000, 0x1000); + memory_region_add_subregion(sysmem, 0xff800000, &s->iomem_ff8); + + memory_region_init_alias(&s->iomem_1fc, "memory-1fc", + &s->iomem, 0x1fc00000, 0x1000); + memory_region_add_subregion(sysmem, 0x1fc00000, &s->iomem_1fc); + + memory_region_init_alias(&s->iomem_ffc, "memory-ffc", + &s->iomem, 0x1fc00000, 0x1000); + memory_region_add_subregion(sysmem, 0xffc00000, &s->iomem_ffc); sh7750_mm_cache_and_tlb = cpu_register_io_memory(sh7750_mmct_read, sh7750_mmct_write, s, @@ -80,7 +80,7 @@ static void shix_init(ram_addr_t ram_size, } /* Register peripherals */ - s = sh7750_init(env); + s = sh7750_init(env, sysmem); /* XXXXX Check success */ tc58128_init(s, "shix_linux_nand.bin", NULL); fprintf(stderr, "initialization terminated\n"); |