aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--hw/dma/sparc32_dma.c8
-rw-r--r--hw/dma/trace-events8
2 files changed, 8 insertions, 8 deletions
diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c
index f64787e..7d00f1a 100644
--- a/hw/dma/sparc32_dma.c
+++ b/hw/dma/sparc32_dma.c
@@ -74,7 +74,7 @@ void ledma_memory_read(void *opaque, hwaddr addr,
int i;
addr |= s->dmaregs[3];
- trace_ledma_memory_read(addr);
+ trace_ledma_memory_read(addr, len);
if (do_bswap) {
sparc_iommu_memory_read(s->iommu, addr, buf, len);
} else {
@@ -95,7 +95,7 @@ void ledma_memory_write(void *opaque, hwaddr addr,
uint16_t tmp_buf[32];
addr |= s->dmaregs[3];
- trace_ledma_memory_write(addr);
+ trace_ledma_memory_write(addr, len);
if (do_bswap) {
sparc_iommu_memory_write(s->iommu, addr, buf, len);
} else {
@@ -140,7 +140,7 @@ void espdma_memory_read(void *opaque, uint8_t *buf, int len)
{
DMADeviceState *s = opaque;
- trace_espdma_memory_read(s->dmaregs[1]);
+ trace_espdma_memory_read(s->dmaregs[1], len);
sparc_iommu_memory_read(s->iommu, s->dmaregs[1], buf, len);
s->dmaregs[1] += len;
}
@@ -149,7 +149,7 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int len)
{
DMADeviceState *s = opaque;
- trace_espdma_memory_write(s->dmaregs[1]);
+ trace_espdma_memory_write(s->dmaregs[1], len);
sparc_iommu_memory_write(s->iommu, s->dmaregs[1], buf, len);
s->dmaregs[1] += len;
}
diff --git a/hw/dma/trace-events b/hw/dma/trace-events
index 428469a..6b367f0 100644
--- a/hw/dma/trace-events
+++ b/hw/dma/trace-events
@@ -7,12 +7,12 @@ rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x"
rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x"
# hw/dma/sparc32_dma.c
-ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64
-ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64
+ledma_memory_read(uint64_t addr, int len) "DMA read addr 0x%"PRIx64 " len %d"
+ledma_memory_write(uint64_t addr, int len) "DMA write addr 0x%"PRIx64 " len %d"
sparc32_dma_set_irq_raise(void) "Raise IRQ"
sparc32_dma_set_irq_lower(void) "Lower IRQ"
-espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
-espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
+espdma_memory_read(uint32_t addr, int len) "DMA read addr 0x%08x len %d"
+espdma_memory_write(uint32_t addr, int len) "DMA write addr 0x%08x len %d"
sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg 0x%"PRIx64": 0x%08x"
sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg 0x%"PRIx64": 0x%08x -> 0x%08x"
sparc32_dma_enable_raise(void) "Raise DMA enable"