diff options
-rw-r--r-- | Makefile.objs | 1 | ||||
-rw-r--r-- | hw/core/loader.c | 3 | ||||
-rw-r--r-- | hw/core/trace-events | 2 |
3 files changed, 6 insertions, 0 deletions
diff --git a/Makefile.objs b/Makefile.objs index 6a143dc..abcbd89 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -203,6 +203,7 @@ trace-events-subdirs += target/riscv trace-events-subdirs += target/s390x trace-events-subdirs += target/sparc trace-events-subdirs += util +trace-events-subdirs += hw/core trace-events-files = $(SRC_PATH)/trace-events $(trace-events-subdirs:%=$(SRC_PATH)/%/trace-events) diff --git a/hw/core/loader.c b/hw/core/loader.c index 75eb56d..0d60219 100644 --- a/hw/core/loader.c +++ b/hw/core/loader.c @@ -45,6 +45,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" #include "qapi/error.h" +#include "trace.h" #include "hw/hw.h" #include "disas/disas.h" #include "migration/vmstate.h" @@ -1151,6 +1152,8 @@ static void rom_reset(void *unused) * CPU definitely fetches its instructions from the just written data. */ cpu_flush_icache_range(rom->addr, rom->datasize); + + trace_loader_write_rom(rom->name, rom->addr, rom->datasize, rom->isrom); } } diff --git a/hw/core/trace-events b/hw/core/trace-events new file mode 100644 index 0000000..fe47a9c --- /dev/null +++ b/hw/core/trace-events @@ -0,0 +1,2 @@ +# loader.c +loader_write_rom(const char *name, uint64_t gpa, uint64_t size, bool isrom) "%s: @0x%"PRIx64" size=0x%"PRIx64" ROM=%d" |