diff options
| -rw-r--r-- | target/riscv/insn_trans/trans_rvi.c.inc | 6 | ||||
| -rw-r--r-- | target/riscv/insn_trans/trans_rvzce.c.inc | 2 | ||||
| -rw-r--r-- | target/riscv/translate.c | 13 |
3 files changed, 9 insertions, 12 deletions
diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc index 4837e13..2d350cf 100644 --- a/target/riscv/insn_trans/trans_rvi.c.inc +++ b/target/riscv/insn_trans/trans_rvi.c.inc @@ -158,7 +158,6 @@ static bool gen_branch(DisasContext *ctx, arg_b *a, TCGCond cond) TCGLabel *l = gen_new_label(); TCGv src1 = get_gpr(ctx, a->rs1, EXT_SIGN); TCGv src2 = get_gpr(ctx, a->rs2, EXT_SIGN); - target_ulong next_pc; if (get_xl(ctx) == MXL_RV128) { TCGv src1h = get_gprh(ctx, a->rs1); @@ -175,12 +174,11 @@ static bool gen_branch(DisasContext *ctx, arg_b *a, TCGCond cond) gen_set_label(l); /* branch taken */ - next_pc = ctx->base.pc_next + a->imm; if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca && - (next_pc & 0x3)) { + (a->imm & 0x3)) { /* misaligned */ TCGv target_pc = tcg_temp_new(); - gen_pc_plus_diff(target_pc, ctx, next_pc); + gen_pc_plus_diff(target_pc, ctx, a->imm); gen_exception_inst_addr_mis(ctx, target_pc); } else { gen_goto_tb(ctx, 0, a->imm); diff --git a/target/riscv/insn_trans/trans_rvzce.c.inc b/target/riscv/insn_trans/trans_rvzce.c.inc index 5732d78..450b79d 100644 --- a/target/riscv/insn_trans/trans_rvzce.c.inc +++ b/target/riscv/insn_trans/trans_rvzce.c.inc @@ -297,7 +297,7 @@ static bool trans_cm_jalt(DisasContext *ctx, arg_cm_jalt *a) * Update pc to current for the non-unwinding exception * that might come from cpu_ld*_code() in the helper. */ - tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next); + gen_update_pc(ctx, 0); gen_helper_cm_jalt(cpu_pc, cpu_env, tcg_constant_i32(a->index)); /* c.jt vs c.jalt depends on the index. */ diff --git a/target/riscv/translate.c b/target/riscv/translate.c index eda022d..7fb4cbe 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -226,8 +226,10 @@ static void decode_save_opc(DisasContext *ctx) } static void gen_pc_plus_diff(TCGv target, DisasContext *ctx, - target_ulong dest) + target_long diff) { + target_ulong dest = ctx->base.pc_next + diff; + if (get_xl(ctx) == MXL_RV32) { dest = (int32_t)dest; } @@ -236,7 +238,7 @@ static void gen_pc_plus_diff(TCGv target, DisasContext *ctx, static void gen_update_pc(DisasContext *ctx, target_long diff) { - gen_pc_plus_diff(cpu_pc, ctx, ctx->base.pc_next + diff); + gen_pc_plus_diff(cpu_pc, ctx, diff); } static void generate_exception(DisasContext *ctx, int excp) @@ -547,14 +549,11 @@ static void gen_set_fpr_d(DisasContext *ctx, int reg_num, TCGv_i64 t) static void gen_jal(DisasContext *ctx, int rd, target_ulong imm) { - target_ulong next_pc; - /* check misaligned: */ - next_pc = ctx->base.pc_next + imm; if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { - if ((next_pc & 0x3) != 0) { + if ((imm & 0x3) != 0) { TCGv target_pc = tcg_temp_new(); - gen_pc_plus_diff(target_pc, ctx, next_pc); + gen_pc_plus_diff(target_pc, ctx, imm); gen_exception_inst_addr_mis(ctx, target_pc); return; } |