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authorj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-12 21:11:03 +0000
committerj_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-12 21:11:03 +0000
commit2e719ba3476fcf1c7c74649d9e16f486eb8c02fc (patch)
tree266674805dfd350f526312e8d158e25d72b4ffe7 /vl.h
parent83b1fb88f854fcd631dc411ab955d5bd3498fbd3 (diff)
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Embedded PowerPC Device Control Registers infrastructure.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2653 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'vl.h')
-rw-r--r--vl.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/vl.h b/vl.h
index b40ff37..df76a9f 100644
--- a/vl.h
+++ b/vl.h
@@ -1147,6 +1147,13 @@ extern QEMUMachine shix_machine;
#ifdef TARGET_PPC
/* PowerPC hardware exceptions management helpers */
ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
+/* Embedded PowerPC DCR management */
+typedef target_ulong (*dcr_read_cb)(void *opaque, int dcrn);
+typedef void (*dcr_write_cb)(void *opaque, int dcrn, target_ulong val);
+int ppc_dcr_init (CPUState *env, int (*dcr_read_error)(int dcrn),
+ int (*dcr_write_error)(int dcrn));
+int ppc_dcr_register (CPUState *env, int dcrn, void *opaque,
+ dcr_read_cb drc_read, dcr_write_cb dcr_write);
#endif
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);