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| author | Idan Horowitz <idan.horowitz@gmail.com> | 2022-04-01 15:35:48 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-04-01 15:35:48 +0100 |
| commit | 0da067f2a83c61efc6f1688d4379269420838b28 (patch) | |
| tree | 93e22df606671fb5a41dfdfd52117023b09f1aea /util/qemu-timer-common.c | |
| parent | 9b617b1bb4056e60b39be4c33be20c10928a6a5c (diff) | |
| download | qemu-0da067f2a83c61efc6f1688d4379269420838b28.zip qemu-0da067f2a83c61efc6f1688d4379269420838b28.tar.gz qemu-0da067f2a83c61efc6f1688d4379269420838b28.tar.bz2 | |
target/arm: Fix MTE access checks for disabled SEL2
While not mentioned anywhere in the actual specification text, the
HCR_EL2.ATA bit is treated as '1' when EL2 is disabled at the current
security state. This can be observed in the psuedo-code implementation
of AArch64.AllocationTagAccessIsEnabled().
Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220328173107.311267-1-idan.horowitz@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'util/qemu-timer-common.c')
0 files changed, 0 insertions, 0 deletions