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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-01-20 15:19:32 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-01-20 15:19:32 +0000 |
| commit | ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26 (patch) | |
| tree | e043c2ae73846077804b25ca3738621b6436df3d /translate-all.c | |
| parent | 83ecb22ba2c91a4674ae109595a8ed1da8de4d7a (diff) | |
| download | qemu-ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26.zip qemu-ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26.tar.gz qemu-ec53b45bcd1f74f7a4c31331fa6d50b402cd6d26.tar.bz2 | |
exec.c: Drop TARGET_HAS_ICE define and checks
The TARGET_HAS_ICE #define is intended to indicate whether a target-*
guest CPU implementation supports the breakpoint handling. However,
all our guest CPUs have that support (the only two which do not
define TARGET_HAS_ICE are unicore32 and openrisc, and in both those
cases the bp support is present and the lack of the #define is just
a bug). So remove the #define entirely: all new guest CPU support
should include breakpoint handling as part of the basic implementation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'translate-all.c')
| -rw-r--r-- | translate-all.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/translate-all.c b/translate-all.c index 687ba7d..4a1b64f 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1451,7 +1451,7 @@ static TranslationBlock *tb_find_pc(uintptr_t tc_ptr) return &tcg_ctx.tb_ctx.tbs[m_max]; } -#if defined(TARGET_HAS_ICE) && !defined(CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr) { ram_addr_t ram_addr; @@ -1467,7 +1467,7 @@ void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr) + addr; tb_invalidate_phys_page_range(ram_addr, ram_addr + 1, 0); } -#endif /* TARGET_HAS_ICE && !defined(CONFIG_USER_ONLY) */ +#endif /* !defined(CONFIG_USER_ONLY) */ void tb_check_watchpoint(CPUState *cpu) { |