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author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 16:16:37 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 16:16:37 +0100 |
commit | 482b61844ae7c6df39df0b48ac90ffbc87bed7d2 (patch) | |
tree | f3344170f132d6c8f01e4693496a37827b654c15 /tests | |
parent | da838dfc40cb7e12e2ae7b33236e426e029fed15 (diff) | |
parent | f06765a94a31bdd8b65fc83fd91a6c3f8e8a1195 (diff) | |
download | qemu-482b61844ae7c6df39df0b48ac90ffbc87bed7d2.zip qemu-482b61844ae7c6df39df0b48ac90ffbc87bed7d2.tar.gz qemu-482b61844ae7c6df39df0b48ac90ffbc87bed7d2.tar.bz2 |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160617' into staging
target-arm queue:
* GICv3 emulation
# gpg: Signature made Fri 17 Jun 2016 15:24:28 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20160617: (22 commits)
ACPI: ARM: Present GIC version in MADT table
hw/timer: Add value matching support to aspeed_timer
target-arm/monitor.c: Advertise emulated GICv3 in capabilities
target-arm/machine.c: Allow user to request GICv3 emulation
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
hw/intc/arm_gicv3: Implement gicv3_cpuif_update()
hw/intc/arm_gicv3: Implement GICv3 CPU interface registers
hw/intc/arm_gicv3: Implement gicv3_set_irq()
hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions
hw/intc/arm_gicv3: Implement GICv3 redistributor registers
hw/intc/arm_gicv3: Implement GICv3 distributor registers
hw/intc/arm_gicv3: Implement functions to identify next pending irq
hw/intc/arm_gicv3: ARM GICv3 device framework
hw/intc/arm_gicv3: Add vmstate descriptors
hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure
hw/intc/arm_gicv3: Add state information
target-arm: Add mp-affinity property for ARM CPU class
target-arm: Provide hook to tell GICv3 about changes of security state
target-arm: Define new arm_is_el3_or_mon() function
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
-rw-r--r-- | tests/test-bitops.c | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/tests/test-bitops.c b/tests/test-bitops.c index eb19a36..5a791d2 100644 --- a/tests/test-bitops.c +++ b/tests/test-bitops.c @@ -65,10 +65,82 @@ static void test_sextract64(void) } } +typedef struct { + uint32_t unshuffled; + uint32_t shuffled; +} Shuffle32Test; + +typedef struct { + uint64_t unshuffled; + uint64_t shuffled; +} Shuffle64Test; + +static const Shuffle32Test test_shuffle32_data[] = { + { 0x0000FFFF, 0x55555555 }, + { 0x000081C5, 0x40015011 }, +}; + +static const Shuffle64Test test_shuffle64_data[] = { + { 0x00000000FFFFFFFFULL, 0x5555555555555555ULL }, + { 0x00000000493AB02CULL, 0x1041054445000450ULL }, +}; + +static void test_half_shuffle32(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(test_shuffle32_data); i++) { + const Shuffle32Test *test = &test_shuffle32_data[i]; + uint32_t r = half_shuffle32(test->unshuffled); + + g_assert_cmpint(r, ==, test->shuffled); + } +} + +static void test_half_shuffle64(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(test_shuffle64_data); i++) { + const Shuffle64Test *test = &test_shuffle64_data[i]; + uint64_t r = half_shuffle64(test->unshuffled); + + g_assert_cmpint(r, ==, test->shuffled); + } +} + +static void test_half_unshuffle32(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(test_shuffle32_data); i++) { + const Shuffle32Test *test = &test_shuffle32_data[i]; + uint32_t r = half_unshuffle32(test->shuffled); + + g_assert_cmpint(r, ==, test->unshuffled); + } +} + +static void test_half_unshuffle64(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(test_shuffle64_data); i++) { + const Shuffle64Test *test = &test_shuffle64_data[i]; + uint64_t r = half_unshuffle64(test->shuffled); + + g_assert_cmpint(r, ==, test->unshuffled); + } +} + int main(int argc, char **argv) { g_test_init(&argc, &argv, NULL); g_test_add_func("/bitops/sextract32", test_sextract32); g_test_add_func("/bitops/sextract64", test_sextract64); + g_test_add_func("/bitops/half_shuffle32", test_half_shuffle32); + g_test_add_func("/bitops/half_shuffle64", test_half_shuffle64); + g_test_add_func("/bitops/half_unshuffle32", test_half_unshuffle32); + g_test_add_func("/bitops/half_unshuffle64", test_half_unshuffle64); return g_test_run(); } |