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author | Alex Bennée <alex.bennee@linaro.org> | 2021-03-23 16:52:54 +0000 |
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committer | Alex Bennée <alex.bennee@linaro.org> | 2021-03-24 14:25:16 +0000 |
commit | 7967d1da7af01c49661241c47708caa6dec78adb (patch) | |
tree | ba0fd35327c3f9c7f9a52af8f56708924818c266 /tests/tcg | |
parent | 35e3f029a966845e090dc8b295312751524df967 (diff) | |
download | qemu-7967d1da7af01c49661241c47708caa6dec78adb.zip qemu-7967d1da7af01c49661241c47708caa6dec78adb.tar.gz qemu-7967d1da7af01c49661241c47708caa6dec78adb.tar.bz2 |
linux-user/riscv: initialise the TaskState heap/stack info
Arguably the target_cpu_copy_regs function for each architecture is
misnamed as a number of the architectures also take the opportunity to
fill out the TaskState structure. This could arguably be factored out
into common code but that would require a wider audit of the
architectures. For now just replicate for riscv so we can correctly
report semihosting information for SYS_HEAPINFO.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20210323165308.15244-9-alex.bennee@linaro.org>
Diffstat (limited to 'tests/tcg')
0 files changed, 0 insertions, 0 deletions