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authorTaylor Simpson <tsimpson@quicinc.com>2023-04-27 15:40:51 -0700
committerTaylor Simpson <tsimpson@quicinc.com>2023-05-18 12:40:51 -0700
commit860132e29543c6ab747745ceeed875593a355d1f (patch)
tree435307b3d397dda942c5fd8b0a5e4de58ee0a265 /tests/tcg
parent406c74f22d457969bdc0b604876d671211cbdaa9 (diff)
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Hexagon (tests/tcg/hexagon) Add v68 scalar tests
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230427224057.3766963-4-tsimpson@quicinc.com>
Diffstat (limited to 'tests/tcg')
-rw-r--r--tests/tcg/hexagon/Makefile.target2
-rw-r--r--tests/tcg/hexagon/v68_scalar.c186
2 files changed, 188 insertions, 0 deletions
diff --git a/tests/tcg/hexagon/Makefile.target b/tests/tcg/hexagon/Makefile.target
index 59b1b07..b7529e2 100644
--- a/tests/tcg/hexagon/Makefile.target
+++ b/tests/tcg/hexagon/Makefile.target
@@ -76,6 +76,8 @@ HEX_TESTS += test_vminh
HEX_TESTS += test_vpmpyh
HEX_TESTS += test_vspliceb
+HEX_TESTS += v68_scalar
+
TESTS += $(HEX_TESTS)
# This test has to be compiled for the -mv67t target
diff --git a/tests/tcg/hexagon/v68_scalar.c b/tests/tcg/hexagon/v68_scalar.c
new file mode 100644
index 0000000..7a8adb1
--- /dev/null
+++ b/tests/tcg/hexagon/v68_scalar.c
@@ -0,0 +1,186 @@
+/*
+ * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <stdio.h>
+#include <stdbool.h>
+#include <stdint.h>
+
+/*
+ * Test the scalar core instructions that are new in v68
+ */
+
+int err;
+
+static int buffer32[] = { 1, 2, 3, 4 };
+static long long buffer64[] = { 5, 6, 7, 8 };
+
+static void __check32(int line, uint32_t result, uint32_t expect)
+{
+ if (result != expect) {
+ printf("ERROR at line %d: 0x%08x != 0x%08x\n",
+ line, result, expect);
+ err++;
+ }
+}
+
+#define check32(RES, EXP) __check32(__LINE__, RES, EXP)
+
+static void __check64(int line, uint64_t result, uint64_t expect)
+{
+ if (result != expect) {
+ printf("ERROR at line %d: 0x%016llx != 0x%016llx\n",
+ line, result, expect);
+ err++;
+ }
+}
+
+#define check64(RES, EXP) __check64(__LINE__, RES, EXP)
+
+static inline int loadw_aq(int *p)
+{
+ int res;
+ asm volatile("%0 = memw_aq(%1)\n\t"
+ : "=r"(res) : "r"(p));
+ return res;
+}
+
+static void test_loadw_aq(void)
+{
+ int res;
+
+ res = loadw_aq(&buffer32[0]);
+ check32(res, 1);
+ res = loadw_aq(&buffer32[1]);
+ check32(res, 2);
+}
+
+static inline long long loadd_aq(long long *p)
+{
+ long long res;
+ asm volatile("%0 = memd_aq(%1)\n\t"
+ : "=r"(res) : "r"(p));
+ return res;
+}
+
+static void test_loadd_aq(void)
+{
+ long long res;
+
+ res = loadd_aq(&buffer64[2]);
+ check64(res, 7);
+ res = loadd_aq(&buffer64[3]);
+ check64(res, 8);
+}
+
+static inline void release_at(int *p)
+{
+ asm volatile("release(%0):at\n\t"
+ : : "r"(p));
+}
+
+static void test_release_at(void)
+{
+ release_at(&buffer32[2]);
+ check64(buffer32[2], 3);
+ release_at(&buffer32[3]);
+ check64(buffer32[3], 4);
+}
+
+static inline void release_st(int *p)
+{
+ asm volatile("release(%0):st\n\t"
+ : : "r"(p));
+}
+
+static void test_release_st(void)
+{
+ release_st(&buffer32[2]);
+ check64(buffer32[2], 3);
+ release_st(&buffer32[3]);
+ check64(buffer32[3], 4);
+}
+
+static inline void storew_rl_at(int *p, int val)
+{
+ asm volatile("memw_rl(%0):at = %1\n\t"
+ : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_storew_rl_at(void)
+{
+ storew_rl_at(&buffer32[2], 9);
+ check64(buffer32[2], 9);
+ storew_rl_at(&buffer32[3], 10);
+ check64(buffer32[3], 10);
+}
+
+static inline void stored_rl_at(long long *p, long long val)
+{
+ asm volatile("memd_rl(%0):at = %1\n\t"
+ : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_stored_rl_at(void)
+{
+ stored_rl_at(&buffer64[2], 11);
+ check64(buffer64[2], 11);
+ stored_rl_at(&buffer64[3], 12);
+ check64(buffer64[3], 12);
+}
+
+static inline void storew_rl_st(int *p, int val)
+{
+ asm volatile("memw_rl(%0):st = %1\n\t"
+ : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_storew_rl_st(void)
+{
+ storew_rl_st(&buffer32[0], 13);
+ check64(buffer32[0], 13);
+ storew_rl_st(&buffer32[1], 14);
+ check64(buffer32[1], 14);
+}
+
+static inline void stored_rl_st(long long *p, long long val)
+{
+ asm volatile("memd_rl(%0):st = %1\n\t"
+ : : "r"(p), "r"(val) : "memory");
+}
+
+static void test_stored_rl_st(void)
+{
+ stored_rl_st(&buffer64[0], 15);
+ check64(buffer64[0], 15);
+ stored_rl_st(&buffer64[1], 15);
+ check64(buffer64[1], 15);
+}
+
+int main()
+{
+ test_loadw_aq();
+ test_loadd_aq();
+ test_release_at();
+ test_release_st();
+ test_storew_rl_at();
+ test_stored_rl_at();
+ test_storew_rl_st();
+ test_stored_rl_st();
+
+ puts(err ? "FAIL" : "PASS");
+ return err ? 1 : 0;
+}