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authorMax Filippov <jcmvbkbc@gmail.com>2022-04-25 20:05:18 -0700
committerMax Filippov <jcmvbkbc@gmail.com>2022-05-06 15:27:40 -0700
commit703cebcfac65356aa2b19c0a5e4aa1b4be23a328 (patch)
tree8c3036c01e992176325412eda62a905613d6ba14 /tests/tcg/xtensa
parente120c8335d1dfa9d194e3db8cc5195a6b47fb20c (diff)
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tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3
Autorefill tests in the phys_mem test suite are disabled for cores that have spanning TLB way, i.e. for all MMUv3 cores. Instead of disabling it invalidate TLB mappings for entries that conflict with the test. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'tests/tcg/xtensa')
-rw-r--r--tests/tcg/xtensa/test_phys_mem.S10
1 files changed, 9 insertions, 1 deletions
diff --git a/tests/tcg/xtensa/test_phys_mem.S b/tests/tcg/xtensa/test_phys_mem.S
index 9bb3ee3..f935a70 100644
--- a/tests/tcg/xtensa/test_phys_mem.S
+++ b/tests/tcg/xtensa/test_phys_mem.S
@@ -2,7 +2,7 @@
test_suite phys_mem
-#if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY
+#if XCHAL_HAVE_PTP_MMU
.purgem test_init
@@ -13,6 +13,14 @@ test_suite phys_mem
witlb a2, a3
movi a2, 0xc0000000
wsr a2, ptevaddr
+#if XCHAL_HAVE_SPANNING_WAY
+ movi a2, 0xc0000000 | XCHAL_SPANNING_WAY
+ idtlb a2
+ iitlb a2
+ movi a2, 0x20000000 | XCHAL_SPANNING_WAY
+ idtlb a2
+ iitlb a2
+#endif
.endm
test inst_fetch_get_pte_no_phys