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author | Taylor Simpson <tsimpson@quicinc.com> | 2022-02-09 18:15:50 -0800 |
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committer | Taylor Simpson <tsimpson@quicinc.com> | 2022-03-12 09:14:22 -0800 |
commit | 4d04395a1716c669cf634a90e768c1baa0e68aff (patch) | |
tree | 24b08d816d0e6183d4edc9c6d27327d307fdd54d /tests/qemu-iotests/022 | |
parent | d76dd816bf328a66ce57b2fb27d046656d3ab411 (diff) | |
download | qemu-4d04395a1716c669cf634a90e768c1baa0e68aff.zip qemu-4d04395a1716c669cf634a90e768c1baa0e68aff.tar.gz qemu-4d04395a1716c669cf634a90e768c1baa0e68aff.tar.bz2 |
Hexagon (tests/tcg/hexagon) test instructions that might set bits in USR
Hexagon has ~200 instructions that set the saturate bit in USR, these
were broken into groups of similar instructions and one instruction
from each group is tested with at least one input that does not
saturate and at least one input that does saturate.
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20220210021556.9217-7-tsimpson@quicinc.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tests/qemu-iotests/022')
0 files changed, 0 insertions, 0 deletions