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author | Richard Henderson <richard.henderson@linaro.org> | 2021-02-01 11:30:30 -1000 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2021-06-19 08:51:39 -0700 |
commit | 7e00a0800051655e6fdd85ad5dd6fcadafc2dc47 (patch) | |
tree | b8d435d7bd9540cc6148be316d48e11064e97517 /tcg | |
parent | fc8ec9e12529eceac4eef483cdde52c14f3ca937 (diff) | |
download | qemu-7e00a0800051655e6fdd85ad5dd6fcadafc2dc47.zip qemu-7e00a0800051655e6fdd85ad5dd6fcadafc2dc47.tar.gz qemu-7e00a0800051655e6fdd85ad5dd6fcadafc2dc47.tar.bz2 |
tcg/tci: Remove tci_write_reg
Inline it into its one caller, tci_write_reg64.
Drop the asserts that are redundant with tcg_read_r.
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/tci.c | 13 |
1 files changed, 2 insertions, 11 deletions
@@ -38,20 +38,11 @@ __thread uintptr_t tci_tb_ptr; -static void -tci_write_reg(tcg_target_ulong *regs, TCGReg index, tcg_target_ulong value) -{ - tci_assert(index < TCG_TARGET_NB_REGS); - tci_assert(index != TCG_AREG0); - tci_assert(index != TCG_REG_CALL_STACK); - regs[index] = value; -} - static void tci_write_reg64(tcg_target_ulong *regs, uint32_t high_index, uint32_t low_index, uint64_t value) { - tci_write_reg(regs, low_index, value); - tci_write_reg(regs, high_index, value >> 32); + regs[low_index] = value; + regs[high_index] = value >> 32; } /* Create a 64 bit value from two 32 bit values. */ |