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| author | Jiajie Chen <c@jia.je> | 2023-09-08 10:21:14 +0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-09-15 05:26:51 -0700 |
| commit | 7d577c3ecd21389cdedcd150c18b5a3929a570c9 (patch) | |
| tree | 14d884b8d8dea35e2d1208135ceef142154c7057 /tcg | |
| parent | 24c42fde52be2152b81ecf51ba75849d401eca63 (diff) | |
| download | qemu-7d577c3ecd21389cdedcd150c18b5a3929a570c9.zip qemu-7d577c3ecd21389cdedcd150c18b5a3929a570c9.tar.gz qemu-7d577c3ecd21389cdedcd150c18b5a3929a570c9.tar.bz2 | |
tcg/loongarch64: Lower neg_vec to vneg
Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230908022302.180442-8-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/loongarch64/tcg-target.c.inc | 8 | ||||
| -rw-r--r-- | tcg/loongarch64/tcg-target.h | 2 |
2 files changed, 9 insertions, 1 deletions
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index d569e44..b36b706 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -1695,6 +1695,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, [TCG_COND_LTU] = {OPC_VSLTI_BU, OPC_VSLTI_HU, OPC_VSLTI_WU, OPC_VSLTI_DU}, }; LoongArchInsn insn; + static const LoongArchInsn neg_vec_insn[4] = { + OPC_VNEG_B, OPC_VNEG_H, OPC_VNEG_W, OPC_VNEG_D + }; a0 = args[0]; a1 = args[1]; @@ -1793,6 +1796,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, case INDEX_op_sub_vec: tcg_out_addsub_vec(s, vece, a0, a1, a2, const_args[2], false); break; + case INDEX_op_neg_vec: + tcg_out32(s, encode_vdvj_insn(neg_vec_insn[vece], a0, a1)); + break; case INDEX_op_dupm_vec: tcg_out_dupm_vec(s, type, vece, a0, a1, a2); break; @@ -1818,6 +1824,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) case INDEX_op_xor_vec: case INDEX_op_nor_vec: case INDEX_op_not_vec: + case INDEX_op_neg_vec: return 1; default: return 0; @@ -1995,6 +2002,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) return C_O1_I2(w, w, w); case INDEX_op_not_vec: + case INDEX_op_neg_vec: return C_O1_I1(w, w); default: diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index f9c5cb1..64c72d0 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -178,7 +178,7 @@ extern bool use_lsx_instructions; #define TCG_TARGET_HAS_v256 0 #define TCG_TARGET_HAS_not_vec 1 -#define TCG_TARGET_HAS_neg_vec 0 +#define TCG_TARGET_HAS_neg_vec 1 #define TCG_TARGET_HAS_abs_vec 0 #define TCG_TARGET_HAS_andc_vec 1 #define TCG_TARGET_HAS_orc_vec 1 |