diff options
author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-10-04 11:06:20 +0200 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-10-07 19:02:33 +0200 |
commit | 7893e42d5d9cafeeab30a114e8ec86517f8a1b36 (patch) | |
tree | 3c347d9ad5fd9c9c7b519cdb96e23991feaaf105 /tcg | |
parent | c2646d49588d834c2bcc050539053074ac43d4ba (diff) | |
download | qemu-7893e42d5d9cafeeab30a114e8ec86517f8a1b36.zip qemu-7893e42d5d9cafeeab30a114e8ec86517f8a1b36.tar.gz qemu-7893e42d5d9cafeeab30a114e8ec86517f8a1b36.tar.bz2 |
tcg: Correct invalid mentions of 'softmmu' by 'system-mode'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20231004090629.37473-6-philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/aarch64/tcg-target.c.inc | 4 | ||||
-rw-r--r-- | tcg/arm/tcg-target.c.inc | 2 | ||||
-rw-r--r-- | tcg/i386/tcg-target.c.inc | 2 | ||||
-rw-r--r-- | tcg/loongarch64/tcg-target.c.inc | 4 | ||||
-rw-r--r-- | tcg/meson.build | 6 | ||||
-rw-r--r-- | tcg/mips/tcg-target.c.inc | 4 | ||||
-rw-r--r-- | tcg/ppc/tcg-target.c.inc | 4 | ||||
-rw-r--r-- | tcg/region.c | 4 | ||||
-rw-r--r-- | tcg/riscv/tcg-target.c.inc | 4 | ||||
-rw-r--r-- | tcg/s390x/tcg-target.c.inc | 4 | ||||
-rw-r--r-- | tcg/sparc64/tcg-target.c.inc | 4 | ||||
-rw-r--r-- | tcg/tcg.c | 11 |
12 files changed, 27 insertions, 26 deletions
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc index 69f2daf..3afb896 100644 --- a/tcg/aarch64/tcg-target.c.inc +++ b/tcg/aarch64/tcg-target.c.inc @@ -1643,8 +1643,8 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) #define MIN_TLB_MASK_TABLE_OFS -512 /* - * For softmmu, perform the TLB load and compare. - * For useronly, perform any required alignment tests. + * For system-mode, perform the TLB load and compare. + * For user-mode, perform any required alignment tests. * In both cases, return a TCGLabelQemuLdst structure if the slow path * is required and fill in @h with the host address for the fast path. */ diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index a2f6010..0d9c2d1 100644 --- a/tcg/arm/tcg-target.c.inc +++ b/tcg/arm/tcg-target.c.inc @@ -353,7 +353,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type, #define ALL_VECTOR_REGS 0xffff0000u /* - * r0-r3 will be overwritten when reading the tlb entry (softmmu only); + * r0-r3 will be overwritten when reading the tlb entry (system-mode only); * r14 will be overwritten by the BLNE branching to the slow path. */ #ifdef CONFIG_SOFTMMU diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index 4e47151..788d608 100644 --- a/tcg/i386/tcg-target.c.inc +++ b/tcg/i386/tcg-target.c.inc @@ -2276,7 +2276,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, int movop = OPC_MOVL_EvGv; /* - * Do big-endian stores with movbe or softmmu. + * Do big-endian stores with movbe or system-mode. * User-only without movbe will have its swapping done generically. */ if (memop & MO_BSWAP) { diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 8f70910..801302d 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -891,8 +891,8 @@ bool tcg_target_has_memory_bswap(MemOp memop) #define MIN_TLB_MASK_TABLE_OFS -(1 << 11) /* - * For softmmu, perform the TLB load and compare. - * For useronly, perform any required alignment tests. + * For system-mode, perform the TLB load and compare. + * For user-mode, perform any required alignment tests. * In both cases, return a TCGLabelQemuLdst structure if the slow path * is required and fill in @h with the host address for the fast path. */ diff --git a/tcg/meson.build b/tcg/meson.build index 4be4a61..895a11d 100644 --- a/tcg/meson.build +++ b/tcg/meson.build @@ -34,12 +34,12 @@ tcg_user = declare_dependency(link_with: libtcg_user, dependencies: tcg_ss.dependencies()) user_ss.add(tcg_user) -libtcg_softmmu = static_library('tcg_softmmu', +libtcg_system = static_library('tcg_system', tcg_ss.sources() + genh, name_suffix: 'fa', c_args: '-DCONFIG_SOFTMMU', build_by_default: false) -tcg_softmmu = declare_dependency(link_with: libtcg_softmmu, +tcg_system = declare_dependency(link_with: libtcg_system, dependencies: tcg_ss.dependencies()) -system_ss.add(tcg_softmmu) +system_ss.add(tcg_system) diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc index f52bda4..e2892ed 100644 --- a/tcg/mips/tcg-target.c.inc +++ b/tcg/mips/tcg-target.c.inc @@ -1258,8 +1258,8 @@ bool tcg_target_has_memory_bswap(MemOp memop) #define MIN_TLB_MASK_TABLE_OFS -32768 /* - * For softmmu, perform the TLB load and compare. - * For useronly, perform any required alignment tests. + * For system-mode, perform the TLB load and compare. + * For user-mode, perform any required alignment tests. * In both cases, return a TCGLabelQemuLdst structure if the slow path * is required and fill in @h with the host address for the fast path. */ diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc index 90d76c2..5c873b2 100644 --- a/tcg/ppc/tcg-target.c.inc +++ b/tcg/ppc/tcg-target.c.inc @@ -2091,8 +2091,8 @@ bool tcg_target_has_memory_bswap(MemOp memop) #define MIN_TLB_MASK_TABLE_OFS -32768 /* - * For softmmu, perform the TLB load and compare. - * For useronly, perform any required alignment tests. + * For system-mode, perform the TLB load and compare. + * For user-mode, perform any required alignment tests. * In both cases, return a TCGLabelQemuLdst structure if the slow path * is required and fill in @h with the host address for the fast path. */ diff --git a/tcg/region.c b/tcg/region.c index a078899..8669245 100644 --- a/tcg/region.c +++ b/tcg/region.c @@ -733,7 +733,7 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) * and then assigning regions to TCG threads so that the threads can translate * code in parallel without synchronization. * - * In softmmu the number of TCG threads is bounded by max_cpus, so we use at + * In system-mode the number of TCG threads is bounded by max_cpus, so we use at * least max_cpus regions in MTTCG. In !MTTCG we use a single region. * Note that the TCG options from the command-line (i.e. -accel accel=tcg,[...]) * must have been parsed before calling this function, since it calls @@ -749,7 +749,7 @@ static int alloc_code_gen_buffer(size_t size, int splitwx, Error **errp) * * However, this user-mode limitation is unlikely to be a significant problem * in practice. Multi-threaded guests share most if not all of their translated - * code, which makes parallel code generation less appealing than in softmmu. + * code, which makes parallel code generation less appealing than in system-mode */ void tcg_region_init(size_t tb_size, int splitwx, unsigned max_cpus) { diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index c2bcdea..d6dbcaf 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -1227,8 +1227,8 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) #define MIN_TLB_MASK_TABLE_OFS -(1 << 11) /* - * For softmmu, perform the TLB load and compare. - * For useronly, perform any required alignment tests. + * For system-mode, perform the TLB load and compare. + * For user-mode, perform any required alignment tests. * In both cases, return a TCGLabelQemuLdst structure if the slow path * is required and fill in @h with the host address for the fast path. */ diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index 7552f63..4ef9ac3 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -1750,8 +1750,8 @@ static bool tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb) #define MIN_TLB_MASK_TABLE_OFS -(1 << 19) /* - * For softmmu, perform the TLB load and compare. - * For useronly, perform any required alignment tests. + * For system-mode, perform the TLB load and compare. + * For user-mode, perform any required alignment tests. * In both cases, return a TCGLabelQemuLdst structure if the slow path * is required and fill in @h with the host address for the fast path. */ diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc index 01ac26c..19d9df4 100644 --- a/tcg/sparc64/tcg-target.c.inc +++ b/tcg/sparc64/tcg-target.c.inc @@ -1033,8 +1033,8 @@ bool tcg_target_has_memory_bswap(MemOp memop) #define MIN_TLB_MASK_TABLE_OFS -(1 << 12) /* - * For softmmu, perform the TLB load and compare. - * For useronly, perform any required alignment tests. + * For system-mode, perform the TLB load and compare. + * For user-mode, perform any required alignment tests. * In both cases, return a TCGLabelQemuLdst structure if the slow path * is required and fill in @h with the host address for the fast path. */ @@ -760,12 +760,13 @@ static void alloc_tcg_plugin_context(TCGContext *s) * In user-mode we just point tcg_ctx to tcg_init_ctx. See the documentation * of tcg_region_init() for the reasoning behind this. * - * In softmmu each caller registers its context in tcg_ctxs[]. Note that in - * softmmu tcg_ctxs[] does not track tcg_ctx_init, since the initial context + * In system-mode each caller registers its context in tcg_ctxs[]. Note that in + * system-mode tcg_ctxs[] does not track tcg_ctx_init, since the initial context * is not used anymore for translation once this function is called. * - * Not tracking tcg_init_ctx in tcg_ctxs[] in softmmu keeps code that iterates - * over the array (e.g. tcg_code_size() the same for both softmmu and user-mode. + * Not tracking tcg_init_ctx in tcg_ctxs[] in system-mode keeps code that + * iterates over the array (e.g. tcg_code_size() the same for both system/user + * modes. */ #ifdef CONFIG_USER_ONLY void tcg_register_thread(void) @@ -1349,7 +1350,7 @@ static void tcg_context_init(unsigned max_cpus) * In user-mode we simply share the init context among threads, since we * use a single region. See the documentation tcg_region_init() for the * reasoning behind this. - * In softmmu we will have at most max_cpus TCG threads. + * In system-mode we will have at most max_cpus TCG threads. */ #ifdef CONFIG_USER_ONLY tcg_ctxs = &tcg_ctx; |