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authorRichard Henderson <richard.henderson@linaro.org>2023-09-13 17:56:21 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-10-04 11:03:54 -0700
commit7857ee114c6518165653d3ba87f24a1815c26f6f (patch)
treecef853de0a34cd94e09ec6a97a3303984133fea3 /tcg
parent06ddecff244a7fbb2c98352cdfed44fea66608bc (diff)
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tcg: Remove TCGContext.tlb_fast_offset
Now that there is no padding between CPUNegativeOffsetState and CPUArchState, this value is constant across all targets. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/tcg.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/tcg/tcg.c b/tcg/tcg.c
index ec3f93a..9256217 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -406,7 +406,8 @@ static uintptr_t G_GNUC_UNUSED get_jmp_target_addr(TCGContext *s, int which)
#if defined(CONFIG_SOFTMMU) && !defined(CONFIG_TCG_INTERPRETER)
static int tlb_mask_table_ofs(TCGContext *s, int which)
{
- return s->tlb_fast_offset + which * sizeof(CPUTLBDescFast);
+ return (offsetof(CPUNegativeOffsetState, tlb.f[which]) -
+ sizeof(CPUNegativeOffsetState));
}
#endif
@@ -734,6 +735,13 @@ static const TCGTargetOpDef constraint_sets[] = {
#include "tcg-target.c.inc"
+#ifndef CONFIG_TCG_INTERPRETER
+/* Validate CPUTLBDescFast placement. */
+QEMU_BUILD_BUG_ON((int)(offsetof(CPUNegativeOffsetState, tlb.f[0]) -
+ sizeof(CPUNegativeOffsetState))
+ < MIN_TLB_MASK_TABLE_OFS);
+#endif
+
static void alloc_tcg_plugin_context(TCGContext *s)
{
#ifdef CONFIG_PLUGIN
@@ -1497,11 +1505,6 @@ void tcg_func_start(TCGContext *s)
tcg_debug_assert(s->addr_type == TCG_TYPE_I32 ||
s->addr_type == TCG_TYPE_I64);
-#if defined(CONFIG_SOFTMMU) && !defined(CONFIG_TCG_INTERPRETER)
- tcg_debug_assert(s->tlb_fast_offset < 0);
- tcg_debug_assert(s->tlb_fast_offset >= MIN_TLB_MASK_TABLE_OFS);
-#endif
-
tcg_debug_assert(s->insn_start_words > 0);
}