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| author | malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-27 11:09:21 +0000 |
|---|---|---|
| committer | malc <malc@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-27 11:09:21 +0000 |
| commit | 4a40e23194e6a6f6d4f8e7f0189e2cde2c0e517f (patch) | |
| tree | 42a5c25ef98e2103ed8502af09cf3fdaa33f1127 /tcg | |
| parent | 301f6d903a68a6595b5ec5520d9fc2fc3d698fa3 (diff) | |
| download | qemu-4a40e23194e6a6f6d4f8e7f0189e2cde2c0e517f.zip qemu-4a40e23194e6a6f6d4f8e7f0189e2cde2c0e517f.tar.gz qemu-4a40e23194e6a6f6d4f8e7f0189e2cde2c0e517f.tar.bz2 | |
Special-case some paths inside tcg_out_tlb_read
a. Use 32bit arithmetics in TARGET_LONG_BITS == 32 case
b. Optimize byte access case in TARGET_LONG_BITS == 64 case
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4955 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/ppc64/tcg-target.c | 36 |
1 files changed, 30 insertions, 6 deletions
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 0fc61e1..11ef4bc 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -523,10 +523,28 @@ static void *qemu_st_helpers[4] = { static void tcg_out_tlb_read (TCGContext *s, int r0, int r1, int r2, int addr_reg, int s_bits, int offset) { -#if TARGET_LONG_BITS == 32 +#ifdef TARGET_LONG_BITS tcg_out_rld (s, RLDICL, addr_reg, addr_reg, 0, 32); -#endif + tcg_out32 (s, (RLWINM + | RA (r0) + | RS (addr_reg) + | SH (32 - (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS)) + | MB (32 - (CPU_TLB_BITS + CPU_TLB_ENTRY_BITS)) + | ME (31 - CPU_TLB_ENTRY_BITS) + ) + ); + tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (TCG_AREG0)); + tcg_out32 (s, (LWZU | RT (r1) | RA (r0) | offset)); + tcg_out32 (s, (RLWINM + | RA (r2) + | RS (addr_reg) + | SH (0) + | MB ((32 - s_bits) & 31) + | ME (31 - TARGET_PAGE_BITS) + ) + ); +#else tcg_out_rld (s, RLDICL, r0, addr_reg, 64 - TARGET_PAGE_BITS, 64 - CPU_TLB_BITS); @@ -537,10 +555,16 @@ static void tcg_out_tlb_read (TCGContext *s, int r0, int r1, int r2, tcg_out32 (s, ADD | TAB (r0, r0, TCG_AREG0)); tcg_out32 (s, LD_ADDR | RT (r1) | RA (r0) | offset); - tcg_out_rld (s, RLDICL, r2, addr_reg, - 64 - TARGET_PAGE_BITS, - TARGET_PAGE_BITS - s_bits); - tcg_out_rld (s, RLDICL, r2, r2, TARGET_PAGE_BITS, 0); + if (!s_bits) { + tcg_out_rld (s, RLDICR, r2, addr_reg, 0, 63 - TARGET_PAGE_BITS); + } + else { + tcg_out_rld (s, RLDICL, r2, addr_reg, + 64 - TARGET_PAGE_BITS, + TARGET_PAGE_BITS - s_bits); + tcg_out_rld (s, RLDICL, r2, r2, TARGET_PAGE_BITS, 0); + } +#endif } static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc) |