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authorRichard Henderson <richard.henderson@linaro.org>2019-07-09 13:23:44 +0200
committerRichard Henderson <richard.henderson@linaro.org>2019-07-14 12:19:00 +0200
commit80f4d7c3ae216c191fb403e149bcba88d6aa40bb (patch)
treec5fe5048ca98c4e0f7c9045f17603f63605558ce /tcg
parent1316b1ddc8a05e418c8134243f8bff8cccbbccb1 (diff)
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tcg: Fix constant folding of INDEX_op_extract2_i32
On a 64-bit host, discard any replications of the 32-bit sign bit when performing the shift and merge. Fixes: https://bugs.launchpad.net/bugs/1834496 Tested-by: Christophe Lyon <christophe.lyon@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/optimize.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/optimize.c b/tcg/optimize.c
index d7c71a6..d2424de 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -1213,8 +1213,8 @@ void tcg_optimize(TCGContext *s)
if (opc == INDEX_op_extract2_i64) {
tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3]));
} else {
- tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3]));
- tmp = (int32_t)tmp;
+ tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) |
+ ((uint32_t)v2 << (32 - op->args[3])));
}
tcg_opt_gen_movi(s, op, op->args[0], tmp);
break;