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author | Richard Henderson <richard.henderson@linaro.org> | 2023-03-20 07:54:45 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-16 20:13:51 -0700 |
commit | 7a9ccb869c31430ac8a852ae45ea95023b2d0d34 (patch) | |
tree | 27edc83ad2623fbb22e9f7d42fb01eaa99e0daa2 /tcg | |
parent | dd7dc93ef056509edd1ec47f7a1d8a7bde9c411f (diff) | |
download | qemu-7a9ccb869c31430ac8a852ae45ea95023b2d0d34.zip qemu-7a9ccb869c31430ac8a852ae45ea95023b2d0d34.tar.gz qemu-7a9ccb869c31430ac8a852ae45ea95023b2d0d34.tar.bz2 |
tcg/i386: Always enable TCG_TARGET_HAS_extr[lh]_i64_i32
Keep all 32-bit values zero extended in the register, not solely when
addresses are 32 bits. This eliminates a dependency on TARGET_LONG_BITS.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/i386/tcg-target.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 943af67..0b5a2c6 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -154,9 +154,9 @@ extern bool have_atomic16; #define TCG_TARGET_HAS_mulsh_i32 0 #if TCG_TARGET_REG_BITS == 64 -/* Keep target addresses zero-extended in a register. */ -#define TCG_TARGET_HAS_extrl_i64_i32 (TARGET_LONG_BITS == 32) -#define TCG_TARGET_HAS_extrh_i64_i32 (TARGET_LONG_BITS == 32) +/* Keep 32-bit values zero-extended in a register. */ +#define TCG_TARGET_HAS_extrl_i64_i32 1 +#define TCG_TARGET_HAS_extrh_i64_i32 1 #define TCG_TARGET_HAS_div2_i64 1 #define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_ext8s_i64 1 |