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author | Richard Henderson <richard.henderson@linaro.org> | 2024-05-27 17:08:46 +0000 |
---|---|---|
committer | Richard Henderson <richard.henderson@linaro.org> | 2024-06-19 10:55:12 -0700 |
commit | 1c05d53baf1366e1f34a055a7f4ab91c11dc211e (patch) | |
tree | f087e2752f3abe78fa9aa5ed4c8797bdb5545529 /tcg | |
parent | 3a7a53c3526771d20443dbe2cc44c7d768b074bd (diff) | |
download | qemu-1c05d53baf1366e1f34a055a7f4ab91c11dc211e.zip qemu-1c05d53baf1366e1f34a055a7f4ab91c11dc211e.tar.gz qemu-1c05d53baf1366e1f34a055a7f4ab91c11dc211e.tar.bz2 |
tcg/loongarch64: Support TCG_TYPE_V64
We can implement this with fld_d, fst_d for load and store,
and then use the normal v128 operations in registers.
This will improve support for guests which use v64.
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/loongarch64/tcg-target.c.inc | 8 | ||||
-rw-r--r-- | tcg/loongarch64/tcg-target.h | 2 |
2 files changed, 7 insertions, 3 deletions
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index de53695..980ea10 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -321,6 +321,7 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) } } break; + case TCG_TYPE_V64: case TCG_TYPE_V128: tcg_out_opc_vori_b(s, ret, arg, 0); break; @@ -838,6 +839,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg dest, } break; case TCG_TYPE_I64: + case TCG_TYPE_V64: if (dest < TCG_REG_V0) { tcg_out_ldst(s, OPC_LD_D, dest, base, offset); } else { @@ -869,6 +871,7 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCGReg src, } break; case TCG_TYPE_I64: + case TCG_TYPE_V64: if (src < TCG_REG_V0) { tcg_out_ldst(s, OPC_ST_D, src, base, offset); } else { @@ -1880,8 +1883,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, a2 = args[2]; a3 = args[3]; - /* Currently only supports V128 */ - tcg_debug_assert(type == TCG_TYPE_V128); + /* Currently only supports V64 & V128 */ + tcg_debug_assert(type == TCG_TYPE_V64 || type == TCG_TYPE_V128); switch (opc) { case INDEX_op_st_vec: @@ -2394,6 +2397,7 @@ static void tcg_target_init(TCGContext *s) tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S9); if (cpuinfo & CPUINFO_LSX) { + tcg_target_available_regs[TCG_TYPE_V64] = ALL_VECTOR_REGS; tcg_target_available_regs[TCG_TYPE_V128] = ALL_VECTOR_REGS; tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V24); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V25); diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index 29e4860..990bad1 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -171,7 +171,7 @@ typedef enum { #define TCG_TARGET_HAS_tst 0 -#define TCG_TARGET_HAS_v64 0 +#define TCG_TARGET_HAS_v64 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v256 0 |