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| author | Richard Henderson <rth@twiddle.net> | 2015-08-29 12:37:33 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:36:26 +1100 |
| commit | 765b842adec4c5a359e69ca08785553599f71496 (patch) | |
| tree | cb87b4e8a3ad9f88148a4d743dee3d62483544ce /tcg | |
| parent | 5fdb4671b08e0d1631447e81348b2b50a6b85bf7 (diff) | |
| download | qemu-765b842adec4c5a359e69ca08785553599f71496.zip qemu-765b842adec4c5a359e69ca08785553599f71496.tar.gz qemu-765b842adec4c5a359e69ca08785553599f71496.tar.bz2 | |
tcg: Rename debug_insn_start to insn_start
With an eye toward making it mandatory.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/tcg-op.h | 6 | ||||
| -rw-r--r-- | tcg/tcg-opc.h | 4 | ||||
| -rw-r--r-- | tcg/tcg.c | 6 |
3 files changed, 8 insertions, 8 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 6da083a..6409db8 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -701,14 +701,14 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi) #endif /* debug info: write the PC of the corresponding QEMU CPU instruction */ -static inline void tcg_gen_debug_insn_start(uint64_t pc) +static inline void tcg_gen_insn_start(uint64_t pc) { /* XXX: must really use a 32 bit size for TCGArg in all cases */ #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS - tcg_gen_op2ii(INDEX_op_debug_insn_start, + tcg_gen_op2ii(INDEX_op_insn_start, (uint32_t)(pc), (uint32_t)(pc >> 32)); #else - tcg_gen_op1i(INDEX_op_debug_insn_start, pc); + tcg_gen_op1i(INDEX_op_insn_start, pc); #endif } diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 02bbf30..f60d3c2 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -175,9 +175,9 @@ DEF(mulsh_i64, 1, 2, 0, IMPL(TCG_TARGET_HAS_mulsh_i64)) /* QEMU specific */ #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS -DEF(debug_insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT) +DEF(insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT) #else -DEF(debug_insn_start, 0, 0, 1, TCG_OPF_NOT_PRESENT) +DEF(insn_start, 0, 0, 1, TCG_OPF_NOT_PRESENT) #endif DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END) DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END) @@ -990,7 +990,7 @@ void tcg_dump_ops(TCGContext *s) def = &tcg_op_defs[c]; args = &s->gen_opparam_buf[op->args]; - if (c == INDEX_op_debug_insn_start) { + if (c == INDEX_op_insn_start) { uint64_t pc; #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS pc = ((uint64_t)args[1] << 32) | args[0]; @@ -1400,7 +1400,7 @@ static void tcg_liveness_analysis(TCGContext *s) } } break; - case INDEX_op_debug_insn_start: + case INDEX_op_insn_start: break; case INDEX_op_discard: /* mark the temporary as dead */ @@ -2359,7 +2359,7 @@ static inline int tcg_gen_code_common(TCGContext *s, case INDEX_op_movi_i64: tcg_reg_alloc_movi(s, args, dead_args, sync_args); break; - case INDEX_op_debug_insn_start: + case INDEX_op_insn_start: break; case INDEX_op_discard: temp_dead(s, args[0]); |