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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-13 09:35:55 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-13 09:35:55 +0000 |
commit | 86dbdd4012427fe6b39664d5153abab05579a2f2 (patch) | |
tree | 3f5b1437e594fe80754c42a5083a0e8e91e95bcc /tcg | |
parent | 5d40cd63027cbf321dd756d6acf244cf5eeda5c2 (diff) | |
download | qemu-86dbdd4012427fe6b39664d5153abab05579a2f2.zip qemu-86dbdd4012427fe6b39664d5153abab05579a2f2.tar.gz qemu-86dbdd4012427fe6b39664d5153abab05579a2f2.tar.bz2 |
tcg/x86_64: add bswap16_i{32,64} and bswap32_i64 ops
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6838 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/x86_64/tcg-target.c | 10 | ||||
-rw-r--r-- | tcg/x86_64/tcg-target.h | 3 |
2 files changed, 13 insertions, 0 deletions
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c index b7c4aa6..92f0733 100644 --- a/tcg/x86_64/tcg-target.c +++ b/tcg/x86_64/tcg-target.c @@ -1094,7 +1094,14 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, args[3], P_REXW); break; + case INDEX_op_bswap16_i32: + case INDEX_op_bswap16_i64: + tcg_out8(s, 0x66); + tcg_out_modrm(s, 0xc1, SHIFT_ROL, args[0]); + tcg_out8(s, 8); + break; case INDEX_op_bswap32_i32: + case INDEX_op_bswap32_i64: tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT, 0, args[0], 0); break; case INDEX_op_bswap64_i64: @@ -1287,7 +1294,10 @@ static const TCGTargetOpDef x86_64_op_defs[] = { { INDEX_op_brcond_i64, { "r", "re" } }, + { INDEX_op_bswap16_i32, { "r", "0" } }, + { INDEX_op_bswap16_i64, { "r", "0" } }, { INDEX_op_bswap32_i32, { "r", "0" } }, + { INDEX_op_bswap32_i64, { "r", "0" } }, { INDEX_op_bswap64_i64, { "r", "0" } }, { INDEX_op_neg_i32, { "r", "0" } }, diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h index 79d22ab..8cb05c6 100644 --- a/tcg/x86_64/tcg-target.h +++ b/tcg/x86_64/tcg-target.h @@ -56,7 +56,10 @@ enum { #define TCG_TARGET_CALL_STACK_OFFSET 0 /* optional instructions */ +#define TCG_TARGET_HAS_bswap16_i32 +#define TCG_TARGET_HAS_bswap16_i64 #define TCG_TARGET_HAS_bswap32_i32 +#define TCG_TARGET_HAS_bswap32_i64 #define TCG_TARGET_HAS_bswap64_i64 #define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_neg_i64 |