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authorPeter Maydell <peter.maydell@linaro.org>2018-01-08 16:17:04 +0000
committerPeter Maydell <peter.maydell@linaro.org>2018-01-08 16:17:04 +0000
commit4124ea4f5bd367ca6412fb2dfe7ac4d80e1504d9 (patch)
tree17171e4a0929447d0b2927ae3506af21be717bcb /tcg/tci.c
parent799044b6a3a0fc63e1e020e4d9266786a2dc7a0b (diff)
parent4fad446bc955fcaa08a21388cf82268824bea10e (diff)
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Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20171229' into staging
Queued TCG patches # gpg: Signature made Fri 29 Dec 2017 20:44:06 GMT # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20171229: tcg: add cs_base and flags to -d exec output tcg: Allow 6 arguments to TCG helpers tcg: Add tcg_signed_cond tcg: Generalize TCGOp parameters tcg: Dynamically allocate TCGOps tcg: Remove TCGV_UNUSED* and TCGV_IS_UNUSED* target/moxie: Fix tlb_fill target/*helper: don't check retaddr before calling cpu_restore_state Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/tci.c')
-rw-r--r--tcg/tci.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/tcg/tci.c b/tcg/tci.c
index 63f2cd5..33edca1 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -40,7 +40,7 @@
tcg_abort(); \
} while (0)
-#if MAX_OPC_PARAM_IARGS != 5
+#if MAX_OPC_PARAM_IARGS != 6
# error Fix needed, number of supported input arguments changed!
#endif
#if TCG_TARGET_REG_BITS == 32
@@ -48,11 +48,12 @@ typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong,
+ tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong);
#else
typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong,
- tcg_target_ulong);
+ tcg_target_ulong, tcg_target_ulong);
#endif
static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
@@ -520,7 +521,9 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
tci_read_reg(regs, TCG_REG_R7),
tci_read_reg(regs, TCG_REG_R8),
tci_read_reg(regs, TCG_REG_R9),
- tci_read_reg(regs, TCG_REG_R10));
+ tci_read_reg(regs, TCG_REG_R10),
+ tci_read_reg(regs, TCG_REG_R11),
+ tci_read_reg(regs, TCG_REG_R12));
tci_write_reg(regs, TCG_REG_R0, tmp64);
tci_write_reg(regs, TCG_REG_R1, tmp64 >> 32);
#else
@@ -528,7 +531,8 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
tci_read_reg(regs, TCG_REG_R1),
tci_read_reg(regs, TCG_REG_R2),
tci_read_reg(regs, TCG_REG_R3),
- tci_read_reg(regs, TCG_REG_R5));
+ tci_read_reg(regs, TCG_REG_R5),
+ tci_read_reg(regs, TCG_REG_R6));
tci_write_reg(regs, TCG_REG_R0, tmp64);
#endif
break;