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authorRichard Henderson <rth@twiddle.net>2013-08-20 14:22:50 -0700
committerRichard Henderson <rth@twiddle.net>2013-09-02 09:08:29 -0700
commitb93949ef6a5dea2b22987f2aa3028068e751a7e4 (patch)
tree3a2ef55c0ef0ec406b377d7b794a58ab5b4e2cc0 /tcg/tcg.c
parent35aa3fb38753bd1557af8370994ce6c5b599e65c (diff)
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tcg: Change flush_icache_range arguments to uintptr_t
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/tcg.c')
-rw-r--r--tcg/tcg.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 541a442..65cffca 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -293,8 +293,7 @@ void tcg_prologue_init(TCGContext *s)
s->code_buf = s->code_gen_prologue;
s->code_ptr = s->code_buf;
tcg_target_qemu_prologue(s);
- flush_icache_range((tcg_target_ulong)s->code_buf,
- (tcg_target_ulong)s->code_ptr);
+ flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr);
#ifdef DEBUG_DISAS
if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
@@ -2415,8 +2414,7 @@ int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
tcg_gen_code_common(s, gen_code_buf, -1);
/* flush instruction cache */
- flush_icache_range((tcg_target_ulong)gen_code_buf,
- (tcg_target_ulong)s->code_ptr);
+ flush_icache_range((uintptr_t)gen_code_buf, (uintptr_t)s->code_ptr);
return s->code_ptr - gen_code_buf;
}