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author | Richard Henderson <richard.henderson@linaro.org> | 2019-04-30 11:02:23 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2019-05-22 15:09:43 -0400 |
commit | 38dc12947ec9106237f9cdbd428792c985cd86ae (patch) | |
tree | e9358d64ea6a91ed24c196f3add29a1f958c6416 /tcg/tcg.c | |
parent | 532ba368a13712724137228b5e7e9435994d25e1 (diff) | |
download | qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.zip qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.tar.gz qemu-38dc12947ec9106237f9cdbd428792c985cd86ae.tar.bz2 |
tcg: Add support for vector bitwise select
This operation performs d = (b & a) | (c & ~a), and is present
on a majority of host vector units. Include gvec expanders.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg.c')
-rw-r--r-- | tcg/tcg.c | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -1646,6 +1646,8 @@ bool tcg_op_supported(TCGOpcode op) case INDEX_op_smax_vec: case INDEX_op_umax_vec: return have_vec && TCG_TARGET_HAS_minmax_vec; + case INDEX_op_bitsel_vec: + return have_vec && TCG_TARGET_HAS_bitsel_vec; default: tcg_debug_assert(op > INDEX_op_last_generic && op < NB_OPS); |