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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-05-19 17:29:27 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-05-23 18:54:28 -0700 |
| commit | fbea7a4084e54f3e604da0b4f8b36ac457d7efc8 (patch) | |
| tree | 1a01bbda4801a634509da8c7369198309a45724e /tcg/tcg-op-ldst.c | |
| parent | d54a20b9dda55d3d1492e447680da80ebc05b76b (diff) | |
| download | qemu-fbea7a4084e54f3e604da0b4f8b36ac457d7efc8.zip qemu-fbea7a4084e54f3e604da0b4f8b36ac457d7efc8.tar.gz qemu-fbea7a4084e54f3e604da0b4f8b36ac457d7efc8.tar.bz2 | |
accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu
With the current structure of cputlb.c, there is no difference
between the little-endian and big-endian entry points, aside
from the assert. Unify the pairs of functions.
The only use of the functions with explicit endianness was in
target/sparc64, and that was only to satisfy the assert: the
correct endianness is already built into memop.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg-op-ldst.c')
| -rw-r--r-- | tcg/tcg-op-ldst.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index f4e508c..3d27c34 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -975,13 +975,11 @@ static void tcg_gen_nonatomic_cmpxchg_i128_int(TCGv_i128 retv, TCGTemp *addr, { if (TCG_TARGET_REG_BITS == 32) { /* Inline expansion below is simply too large for 32-bit hosts. */ - gen_atomic_cx_i128 gen = ((memop & MO_BSWAP) == MO_LE - ? gen_helper_nonatomic_cmpxchgo_le - : gen_helper_nonatomic_cmpxchgo_be); MemOpIdx oi = make_memop_idx(memop, idx); TCGv_i64 a64 = maybe_extend_addr64(addr); - gen(retv, cpu_env, a64, cmpv, newv, tcg_constant_i32(oi)); + gen_helper_nonatomic_cmpxchgo(retv, cpu_env, a64, cmpv, newv, + tcg_constant_i32(oi)); maybe_free_addr64(a64); } else { TCGv_i128 oldv = tcg_temp_ebb_new_i128(); |