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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-12-08 23:05:03 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-01-06 23:07:10 +0000 |
| commit | 90497e03ca7432153c5db4a06019265486541d44 (patch) | |
| tree | 9b67c8bcdbca5ea9f6018e2b2e1ffca0fd624de1 /tcg/s390x | |
| parent | 1818c71ba11682b239bbc3d891743edc0943f79f (diff) | |
| download | qemu-90497e03ca7432153c5db4a06019265486541d44.zip qemu-90497e03ca7432153c5db4a06019265486541d44.tar.gz qemu-90497e03ca7432153c5db4a06019265486541d44.tar.bz2 | |
tcg/s390x: Avoid the constant pool in tcg_out_movi
Load constants in no more than two insns, which turns
out to be faster than using the constant pool.
Suggested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/s390x')
| -rw-r--r-- | tcg/s390x/tcg-target.c.inc | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc index b72c43e..2b38fd9 100644 --- a/tcg/s390x/tcg-target.c.inc +++ b/tcg/s390x/tcg-target.c.inc @@ -877,6 +877,9 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg dst, TCGReg src) static const S390Opcode li_insns[4] = { RI_LLILL, RI_LLILH, RI_LLIHL, RI_LLIHH }; +static const S390Opcode oi_insns[4] = { + RI_OILL, RI_OILH, RI_OIHL, RI_OIHH +}; static const S390Opcode lif_insns[2] = { RIL_LLILF, RIL_LLIHF, }; @@ -928,9 +931,20 @@ static void tcg_out_movi(TCGContext *s, TCGType type, return; } - /* Otherwise, stuff it in the constant pool. */ - tcg_out_insn(s, RIL, LGRL, ret, 0); - new_pool_label(s, sval, R_390_PC32DBL, s->code_ptr - 2, 2); + /* Otherwise, load it by parts. */ + i = is_const_p16((uint32_t)uval); + if (i >= 0) { + tcg_out_insn_RI(s, li_insns[i], ret, uval >> (i * 16)); + } else { + tcg_out_insn(s, RIL, LLILF, ret, uval); + } + uval >>= 32; + i = is_const_p16(uval); + if (i >= 0) { + tcg_out_insn_RI(s, oi_insns[i + 2], ret, uval >> (i * 16)); + } else { + tcg_out_insn(s, RIL, OIHF, ret, uval); + } } /* Emit a load/store type instruction. Inputs are: @@ -1160,9 +1174,6 @@ static void tgen_andi(TCGContext *s, TCGType type, TCGReg dest, uint64_t val) static void tgen_ori(TCGContext *s, TCGReg dest, uint64_t val) { - static const S390Opcode oi_insns[4] = { - RI_OILL, RI_OILH, RI_OIHL, RI_OIHH - }; static const S390Opcode oif_insns[2] = { RIL_OILF, RIL_OIHF }; |