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author | Richard Henderson <rth@twiddle.net> | 2010-02-18 14:44:39 -0800 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2010-02-20 08:35:12 +0000 |
commit | 36828256692c3cecc83607f22761ceefc382040e (patch) | |
tree | a78607741f3b9da5cd8787641a9503442db06232 /tcg/s390 | |
parent | 18c8f7a35d7b771392326c5723abe4e6b5908ca0 (diff) | |
download | qemu-36828256692c3cecc83607f22761ceefc382040e.zip qemu-36828256692c3cecc83607f22761ceefc382040e.tar.gz qemu-36828256692c3cecc83607f22761ceefc382040e.tar.bz2 |
tcg: Add comments for all optional instructions not implemented.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/s390')
-rw-r--r-- | tcg/s390/tcg-target.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 91b931d..e803401 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -46,6 +46,36 @@ enum { }; #define TCG_TARGET_NB_REGS 16 +/* optional instructions */ +// #define TCG_TARGET_HAS_div_i32 +// #define TCG_TARGET_HAS_rot_i32 +// #define TCG_TARGET_HAS_ext8s_i32 +// #define TCG_TARGET_HAS_ext16s_i32 +// #define TCG_TARGET_HAS_ext8u_i32 +// #define TCG_TARGET_HAS_ext16u_i32 +// #define TCG_TARGET_HAS_bswap16_i32 +// #define TCG_TARGET_HAS_bswap32_i32 +// #define TCG_TARGET_HAS_not_i32 +// #define TCG_TARGET_HAS_neg_i32 +// #define TCG_TARGET_HAS_andc_i32 +// #define TCG_TARGET_HAS_orc_i32 + +// #define TCG_TARGET_HAS_div_i64 +// #define TCG_TARGET_HAS_rot_i64 +// #define TCG_TARGET_HAS_ext8s_i64 +// #define TCG_TARGET_HAS_ext16s_i64 +// #define TCG_TARGET_HAS_ext32s_i64 +// #define TCG_TARGET_HAS_ext8u_i64 +// #define TCG_TARGET_HAS_ext16u_i64 +// #define TCG_TARGET_HAS_ext32u_i64 +// #define TCG_TARGET_HAS_bswap16_i64 +// #define TCG_TARGET_HAS_bswap32_i64 +// #define TCG_TARGET_HAS_bswap64_i64 +// #define TCG_TARGET_HAS_not_i64 +// #define TCG_TARGET_HAS_neg_i64 +// #define TCG_TARGET_HAS_andc_i64 +// #define TCG_TARGET_HAS_orc_i64 + /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_R15 #define TCG_TARGET_STACK_ALIGN 8 |