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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 11:17:01 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:17:49 +0100 |
| commit | 678155b2c50aa3bf37abef6bfe914bf58f49bec2 (patch) | |
| tree | 0a1e598a31c2bc1b47c2055c1f6fb2fddf3cf988 /tcg/riscv | |
| parent | 732e89f4c401c3cf175aa84c987a029b9729070b (diff) | |
| download | qemu-678155b2c50aa3bf37abef6bfe914bf58f49bec2.zip qemu-678155b2c50aa3bf37abef6bfe914bf58f49bec2.tar.gz qemu-678155b2c50aa3bf37abef6bfe914bf58f49bec2.tar.bz2 | |
tcg: Split out tcg_out_ext8s
We will need a backend interface for performing 8-bit sign-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/riscv')
| -rw-r--r-- | tcg/riscv/tcg-target.c.inc | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 558de12..04b27f6 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -585,7 +585,7 @@ static void tcg_out_ext32u(TCGContext *s, TCGReg ret, TCGReg arg) tcg_out_opc_imm(s, OPC_SRLI, ret, ret, 32); } -static void tcg_out_ext8s(TCGContext *s, TCGReg ret, TCGReg arg) +static void tcg_out_ext8s(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg) { tcg_out_opc_imm(s, OPC_SLLIW, ret, arg, 24); tcg_out_opc_imm(s, OPC_SRAIW, ret, ret, 24); @@ -1612,11 +1612,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_ext32u(s, a0, a1); break; - case INDEX_op_ext8s_i32: - case INDEX_op_ext8s_i64: - tcg_out_ext8s(s, a0, a1); - break; - case INDEX_op_ext16s_i32: case INDEX_op_ext16s_i64: tcg_out_ext16s(s, a0, a1); @@ -1651,6 +1646,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_call: /* Always emitted via tcg_out_call. */ case INDEX_op_exit_tb: /* Always emitted via tcg_out_exit_tb. */ case INDEX_op_goto_tb: /* Always emitted via tcg_out_goto_tb. */ + case INDEX_op_ext8s_i32: /* Always emitted via tcg_reg_alloc_op. */ + case INDEX_op_ext8s_i64: default: g_assert_not_reached(); } |