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authorRichard Henderson <richard.henderson@linaro.org>2023-04-05 16:25:22 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-04-23 08:21:30 +0100
commit379afdff47556f01e75ce2caffd7ae9efa4f1214 (patch)
tree5ef028391e8d09a07713234138ccd6ee6420e1ef /tcg/ppc
parent753e42eada5c790bb3727c262f2e368e81cc788f (diff)
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tcg: Split out tcg_out_ext16u
We will need a backend interface for performing 16-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc')
-rw-r--r--tcg/ppc/tcg-target.c.inc4
1 files changed, 3 insertions, 1 deletions
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index e4b997f..28929ed 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -790,7 +790,7 @@ static void tcg_out_ext16s(TCGContext *s, TCGType type, TCGReg dst, TCGReg src)
tcg_out32(s, EXTSH | RA(dst) | RS(src));
}
-static inline void tcg_out_ext16u(TCGContext *s, TCGReg dst, TCGReg src)
+static void tcg_out_ext16u(TCGContext *s, TCGReg dst, TCGReg src)
{
tcg_out32(s, ANDI | SAI(src, dst, 0xffff));
}
@@ -3128,6 +3128,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext8u_i64:
case INDEX_op_ext16s_i32:
case INDEX_op_ext16s_i64:
+ case INDEX_op_ext16u_i32:
+ case INDEX_op_ext16u_i64:
default:
g_assert_not_reached();
}