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| author | Richard Henderson <rth@twiddle.net> | 2014-04-30 11:39:20 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2014-06-23 07:31:58 -0700 |
| commit | 796f1a689d935e74c7f8a1967ee2cf432e556800 (patch) | |
| tree | a71e4759fc2d7c41650eded96ffb002ae5e10453 /tcg/ppc64/tcg-target.h | |
| parent | b31284cecf36c75179dac828344fcce2b21204c4 (diff) | |
| download | qemu-796f1a689d935e74c7f8a1967ee2cf432e556800.zip qemu-796f1a689d935e74c7f8a1967ee2cf432e556800.tar.gz qemu-796f1a689d935e74c7f8a1967ee2cf432e556800.tar.bz2 | |
tcg-ppc64: Begin merging ppc32 with ppc64
Just enough to compile, assuming you edit config-host.mak manually.
It will still abort at runtime, due to missing brcond2, setcond2, mulu2.
Tested-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/ppc64/tcg-target.h')
| -rw-r--r-- | tcg/ppc64/tcg-target.h | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h index d3a1b53..726635f 100644 --- a/tcg/ppc64/tcg-target.h +++ b/tcg/ppc64/tcg-target.h @@ -24,6 +24,12 @@ #ifndef TCG_TARGET_PPC64 #define TCG_TARGET_PPC64 1 +#ifdef _ARCH_PPC64 +# define TCG_TARGET_REG_BITS 64 +#else +# define TCG_TARGET_REG_BITS 32 +#endif + #define TCG_TARGET_NB_REGS 32 #define TCG_TARGET_INSN_UNIT_SIZE 4 @@ -44,9 +50,6 @@ typedef enum { /* optional instructions automatically implemented */ #define TCG_TARGET_HAS_ext8u_i32 0 /* andi */ #define TCG_TARGET_HAS_ext16u_i32 0 -#define TCG_TARGET_HAS_ext8u_i64 0 -#define TCG_TARGET_HAS_ext16u_i64 0 -#define TCG_TARGET_HAS_ext32u_i64 0 /* optional instructions */ #define TCG_TARGET_HAS_div_i32 1 @@ -65,20 +68,24 @@ typedef enum { #define TCG_TARGET_HAS_nor_i32 1 #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 -#define TCG_TARGET_HAS_add2_i32 0 -#define TCG_TARGET_HAS_sub2_i32 0 #define TCG_TARGET_HAS_mulu2_i32 0 #define TCG_TARGET_HAS_muls2_i32 0 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 -#define TCG_TARGET_HAS_trunc_shr_i32 0 +#if TCG_TARGET_REG_BITS == 64 +#define TCG_TARGET_HAS_add2_i32 0 +#define TCG_TARGET_HAS_sub2_i32 0 +#define TCG_TARGET_HAS_trunc_shr_i32 0 #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 0 #define TCG_TARGET_HAS_rot_i64 1 #define TCG_TARGET_HAS_ext8s_i64 1 #define TCG_TARGET_HAS_ext16s_i64 1 #define TCG_TARGET_HAS_ext32s_i64 1 +#define TCG_TARGET_HAS_ext8u_i64 0 +#define TCG_TARGET_HAS_ext16u_i64 0 +#define TCG_TARGET_HAS_ext32u_i64 0 #define TCG_TARGET_HAS_bswap16_i64 1 #define TCG_TARGET_HAS_bswap32_i64 1 #define TCG_TARGET_HAS_bswap64_i64 1 @@ -97,5 +104,6 @@ typedef enum { #define TCG_TARGET_HAS_muls2_i64 0 #define TCG_TARGET_HAS_muluh_i64 1 #define TCG_TARGET_HAS_mulsh_i64 1 +#endif #endif |