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author | Peter Maydell <peter.maydell@linaro.org> | 2014-04-24 15:24:51 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-24 15:24:52 +0100 |
commit | ad600a4d49293f6b8eda7932f90e5aa5fa2021b0 (patch) | |
tree | d8c5b8685168c1fd1d8d35357c31fe20d0700efb /tcg/ppc/tcg-target.h | |
parent | ba3627ec384d6c68e87c466895a4d78422669e30 (diff) | |
parent | 02eb19d0ec19ac8fb1de1116999184663763eaa0 (diff) | |
download | qemu-ad600a4d49293f6b8eda7932f90e5aa5fa2021b0.zip qemu-ad600a4d49293f6b8eda7932f90e5aa5fa2021b0.tar.gz qemu-ad600a4d49293f6b8eda7932f90e5aa5fa2021b0.tar.bz2 |
Merge remote-tracking branch 'remotes/rth/tags/tcg-next-20140422' into staging
Pull tcg 2014-04-22
# gpg: Signature made Tue 22 Apr 2014 22:00:04 BST using RSA key ID 4DD0279B
# gpg: Can't check signature: public key not found
* remotes/rth/tags/tcg-next-20140422:
tcg: Use HOST_WORDS_BIGENDIAN
tcg: Fix fallback from muls2_i64 to mulu2_i64
tcg: Use tcg_gen_mulu2_i32 in tcg_gen_muls2_i32
tcg: Relax requirement for mulu2_i32 on 32-bit hosts
tcg-s390: Remove W constraint
tcg-sparc: Use the type parameter to tcg_target_const_match
tcg-ppc64: Use the type parameter to tcg_target_const_match
tcg-aarch64: Remove w constraint
tcg: Add TCGType parameter to tcg_target_const_match
tcg: Fix out of range shift in deposit optimizations
tci: Mask shift counts to avoid undefined behavior
tcg: Mask shift quantities while folding
tcg: Use "unspecified behavior" for shifts
tcg: Fix warning (1 bit signed bitfield entry) and replace int by bool
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg/ppc/tcg-target.h')
-rw-r--r-- | tcg/ppc/tcg-target.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index e3395e3..0d4f595 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -24,7 +24,6 @@ #ifndef TCG_TARGET_PPC #define TCG_TARGET_PPC 1 -#define TCG_TARGET_WORDS_BIGENDIAN #define TCG_TARGET_NB_REGS 32 typedef enum { @@ -95,6 +94,7 @@ typedef enum { #define TCG_TARGET_HAS_nor_i32 1 #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 +#define TCG_TARGET_HAS_mulu2_i32 1 #define TCG_TARGET_HAS_muls2_i32 0 #define TCG_TARGET_HAS_muluh_i32 0 #define TCG_TARGET_HAS_mulsh_i32 0 |