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| author | Richard Henderson <richard.henderson@linaro.org> | 2020-04-20 03:46:12 +0000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2020-06-02 08:42:37 -0700 |
| commit | ab87a66fa276b61f1d6adbc9271988e42bdf4c1e (patch) | |
| tree | c5178733a3a6d1fb7bf21bda28b9097338d2f3f5 /tcg/ppc/tcg-target.h | |
| parent | 7cff8988fade36f20659aad80f2f763ff054ef48 (diff) | |
| download | qemu-ab87a66fa276b61f1d6adbc9271988e42bdf4c1e.zip qemu-ab87a66fa276b61f1d6adbc9271988e42bdf4c1e.tar.gz qemu-ab87a66fa276b61f1d6adbc9271988e42bdf4c1e.tar.bz2 | |
tcg/ppc: Implement INDEX_op_rot[lr]v_vec
We already had support for rotlv, using a target-specific opcode;
convert to use the generic opcode. Handle rotrv via simple negation.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc/tcg-target.h')
| -rw-r--r-- | tcg/ppc/tcg-target.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 4a17aeb..be5b290 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -163,7 +163,7 @@ extern bool have_vsx; #define TCG_TARGET_HAS_abs_vec 0 #define TCG_TARGET_HAS_roti_vec 0 #define TCG_TARGET_HAS_rots_vec 0 -#define TCG_TARGET_HAS_rotv_vec 0 +#define TCG_TARGET_HAS_rotv_vec 1 #define TCG_TARGET_HAS_shi_vec 0 #define TCG_TARGET_HAS_shs_vec 0 #define TCG_TARGET_HAS_shv_vec 1 |