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author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-05 18:29:04 +0300 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-07-08 07:30:17 +0100 |
commit | 623d7e3551a6fc5693c06ea938c60fe281b52e27 (patch) | |
tree | f32537daa61ae4faa823be2e11f457eb9918e5e0 /tcg/ppc/tcg-target.h | |
parent | 276d72ca1b9017916cadc7c170d0d6b31633a9e5 (diff) | |
download | qemu-623d7e3551a6fc5693c06ea938c60fe281b52e27.zip qemu-623d7e3551a6fc5693c06ea938c60fe281b52e27.tar.gz qemu-623d7e3551a6fc5693c06ea938c60fe281b52e27.tar.bz2 |
util: Add cpuinfo-ppc.c
Move the code from tcg/. Fix a bug in that PPC_FEATURE2_ARCH_3_10
is actually spelled PPC_FEATURE2_ARCH_3_1.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/ppc/tcg-target.h')
-rw-r--r-- | tcg/ppc/tcg-target.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index c7552b6..9a41fab 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -25,6 +25,8 @@ #ifndef PPC_TCG_TARGET_H #define PPC_TCG_TARGET_H +#include "host/cpuinfo.h" + #define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) #define TCG_TARGET_NB_REGS 64 @@ -61,14 +63,12 @@ typedef enum { tcg_isa_3_10, } TCGPowerISA; -extern TCGPowerISA have_isa; -extern bool have_altivec; -extern bool have_vsx; - -#define have_isa_2_06 (have_isa >= tcg_isa_2_06) -#define have_isa_2_07 (have_isa >= tcg_isa_2_07) -#define have_isa_3_00 (have_isa >= tcg_isa_3_00) -#define have_isa_3_10 (have_isa >= tcg_isa_3_10) +#define have_isa_2_06 (cpuinfo & CPUINFO_V2_06) +#define have_isa_2_07 (cpuinfo & CPUINFO_V2_07) +#define have_isa_3_00 (cpuinfo & CPUINFO_V3_0) +#define have_isa_3_10 (cpuinfo & CPUINFO_V3_1) +#define have_altivec (cpuinfo & CPUINFO_ALTIVEC) +#define have_vsx (cpuinfo & CPUINFO_VSX) /* optional instructions automatically implemented */ #define TCG_TARGET_HAS_ext8u_i32 0 /* andi */ |