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authorRichard Henderson <richard.henderson@linaro.org>2023-10-25 21:14:01 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-11-06 08:27:21 -0800
commit3871be753f3351c21c8e384432f7798c3eed9de9 (patch)
tree9ec604b917a5511b36e5fc6d40997e355890bfa4 /tcg/mips
parent2cff741da81416ba7d4d8f2470e75d0e13bccae4 (diff)
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tcg: Remove TCG_TARGET_HAS_movcond_{i32,i64}
The movcond opcode is now mandatory for backends to implement. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231026041404.1229328-4-richard.henderson@linaro.org>
Diffstat (limited to 'tcg/mips')
-rw-r--r--tcg/mips/tcg-target.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 0a4083f..5b3fdcc 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -154,7 +154,6 @@ extern bool use_mips32r2_instructions;
#endif
/* optional instructions detected at runtime */
-#define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_bswap16_i32 use_mips32r2_instructions
#define TCG_TARGET_HAS_deposit_i32 use_mips32r2_instructions
#define TCG_TARGET_HAS_extract_i32 use_mips32r2_instructions
@@ -169,7 +168,6 @@ extern bool use_mips32r2_instructions;
#define TCG_TARGET_HAS_qemu_st8_i32 0
#if TCG_TARGET_REG_BITS == 64
-#define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_bswap16_i64 use_mips32r2_instructions
#define TCG_TARGET_HAS_bswap32_i64 use_mips32r2_instructions
#define TCG_TARGET_HAS_bswap64_i64 use_mips32r2_instructions