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| author | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-10 18:30:05 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-12 00:06:07 +0100 |
| commit | 56779034530944eb6171d843f652f3fba710ed30 (patch) | |
| tree | bdb4eb8143f70a010b216e2c9921f7bb84fac55b /tcg/mips | |
| parent | dace20dcc98f90a931e88aa641f5633cdcf30c30 (diff) | |
| download | qemu-56779034530944eb6171d843f652f3fba710ed30.zip qemu-56779034530944eb6171d843f652f3fba710ed30.tar.gz qemu-56779034530944eb6171d843f652f3fba710ed30.tar.bz2 | |
tcg arm/mips/ia64: add a comment about retranslation and caches
Add a comment about cache coherency and retranslation, so that people
developping new targets based on existing ones are warned of the issue.
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/mips')
| -rw-r--r-- | tcg/mips/tcg-target.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 4e92a50..e04b0dc 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -351,7 +351,9 @@ static inline void tcg_out_opc_imm(TCGContext *s, int opc, int rt, int rs, int i */ static inline void tcg_out_opc_br(TCGContext *s, int opc, int rt, int rs) { - /* We need to keep the offset unchanged for retranslation */ + /* We pay attention here to not modify the branch target by reading + the existing value and using it again. This ensure that caches and + memory are kept coherent during retranslation. */ uint16_t offset = (uint16_t)(*(uint32_t *) s->code_ptr); tcg_out_opc_imm(s, opc, rt, rs, offset); |